[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: CTS fixes (rev3)
Chris Wilson
chris at chris-wilson.co.uk
Tue Jun 25 13:28:45 UTC 2019
Quoting Lionel Landwerlin (2019-06-25 14:24:42)
> On 25/06/2019 16:14, Chris Wilson wrote:
> > Quoting Lionel Landwerlin (2019-06-25 14:09:57)
> >> Anybody knows whether the selftests are dealing with read only
> >> whitelisted registers?
> >> I'm not quite sure what can be tested with those (unless you can
> >> exercise the 3d pipeline in this case).
> > John added a hack:
> >
> > static bool ro_register(u32 reg)
> > {
> > if (reg & RING_FORCE_TO_NONPRIV_RD)
> > return true;
> >
> > return false;
> > }
> >
> > to ignore them. It is not clear why that did not take.
> > -Chris
> >
> Oh...
>
> That seems broken for a read only register and a default value of 0 :
True. Tvrtko proved right that he should have held out for an actual
selftest rather than letting it through with a hack.
-Chris
More information about the Intel-gfx
mailing list