[Intel-gfx] [PATCH 1/2] drm/i915/icl: Default to Thread Group preemption for compute workloads

[Chris Wilson]

Quoting Rafael Antognolli (2019-03-05 17:30:00)
> On Tue, Mar 05, 2019 at 01:48:26PM +0100, Michał Winiarski wrote:
> > We assumed that the default preemption granularity is fine for ICL.
> > Unfortunately, it turns out that some drivers don't support mid-thread
> > preemption for compute workloads.
> > If a workload that doesn't support mid-thread preemption gets mid-thread
> > preempted, we're going to observe a GPU hang.
> > While I'm here, let's also update the "workaround" naming.
> 
> Yeah, in Mesa we are not implementing the SIP, so we can't do
> thread-level preemption yet and need the granularity to be no higher
> than thread group level.
> 
> Acked-by: Rafael Antognolli <rafael.antognolli at intel.com>
> 
> > Signed-off-by: Michał Winiarski <michal.winiarski at intel.com>
> > Cc: Anuj Phogat <anuj.phogat at intel.com>
> > Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> > Cc: Matt Roper <matthew.d.roper at intel.com>
> > Cc: Rafael Antognolli <rafael.antognolli at intel.com>
> > Tested-by: Anuj Phogat <anuj.phogat at intel.com>
> > Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>

And pushed, thanks everyone for the testing and reviewed. I've held off
on pushing the second patch as we just want to double check that the
whitelisting is required.
-Chris