[Intel-gfx] [RFC 0/3] Display uncore

[Daniele Ceraolo Spurio]

On 10/29/19 2:23 AM, Jani Nikula wrote:
> On Wed, 07 Aug 2019, Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com> wrote:
>> I've been trying to identify MMIO ranges to clearly define what belongs
>> to display_uncore to do a check on access, but there are lots of
>> exceptions and differences across gens (with a few more coming with TGL),
>> so I don't think that's a viable way. The alternative option implemented
>> here is to differentiate the register by type, which should ensure we
>> never mix them up, but at the cost of a more complex transition.
>>
>> Thoughts? I'm very open to (and I actually hope for) better ideas.
> 
> Has there been any progress in this front lately, or have I just missed
> it?
> 

No progress on the ML. I've been locally trying on and off to break 
i915_reg.h in more manageable chunks to be able to more easily mark the 
display registers, but I keep finding special cases, especially around 
VLV/CHV. I'll try to prioritize this task more and get something out, at 
least as a RFC.

Daniele

> BR,
> Jani.
>