[Intel-gfx] [PATCH v3 5/7] drm/i915/tgl: disable SAGV temporarily

Matt Roper matthew.d.roper at intel.com
Tue Sep 3 22:05:59 UTC 2019


On Thu, Aug 29, 2019 at 02:25:52AM -0700, Lucas De Marchi wrote:
> SAGV is not currently working for Tiger Lake. We better disable it until
> the implementation is stabilized and we can enable it.

Does "not currently working" refer to the hardware not working in the
current stepping, or is it just a matter of us not having proper
sequences documented yet in the bspec (and gen11's sequences not being
sufficient)?

Something more descriptive than "HACK!" in the comment below might be a
good idea since we're trying to land this upstream.


Matt

> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 4fa9bc83c8b4..7294fcf05323 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3654,6 +3654,10 @@ static bool skl_needs_memory_bw_wa(struct drm_i915_private *dev_priv)
>  static bool
>  intel_has_sagv(struct drm_i915_private *dev_priv)
>  {
> +	/* HACK! */
> +	if (IS_GEN(dev_priv, 12))
> +		return false;
> +
>  	return (IS_GEN9_BC(dev_priv) || INTEL_GEN(dev_priv) >= 10) &&
>  		dev_priv->sagv_status != I915_SAGV_NOT_CONTROLLED;
>  }
> -- 
> 2.23.0
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795


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