[Intel-gfx] [PATCH 1/2] drm/i915: Apply FBC WA for TGL too

[Matt Roper]

On Wed, Sep 04, 2019 at 04:02:40PM -0700, José Roberto de Souza wrote:
> WA 1409120013 is also valid for TGL, so lets check for ">= 11".
> 
> BSpec: 52890
> 
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Cc: Clinton Taylor <Clinton.A.Taylor at intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza at intel.com>

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 16ed44bfd734..dc34b23e2320 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -343,8 +343,8 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv)
>  			   HSW_FBCQ_DIS);
>  	}
>  
> -	if (IS_GEN(dev_priv, 11))
> -		/* Wa_1409120013:icl,ehl */
> +	if (INTEL_GEN(dev_priv) >= 11)
> +		/* Wa_1409120013:icl,ehl,tgl */
>  		I915_WRITE(ILK_DPFC_CHICKEN, ILK_DPFC_CHICKEN_COMP_DUMMY_PIXEL);
>  
>  	I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
> -- 
> 2.23.0
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795