[Intel-gfx] [PATCH v5 08/11] drm/i915/dsb: added dsb refcount to synchronize between get/put.
Animesh Manna
animesh.manna at intel.com
Mon Sep 9 17:02:39 UTC 2019
On 9/9/2019 6:51 PM, Sharma, Shashank wrote:
>
> On 9/7/2019 4:37 PM, Animesh Manna wrote:
>> The lifetime of command buffer can be controlled by the dsb user
>> throuh refcount. Added refcount mechanism is dsb get/put call
>> which create/destroy dsb context.
>>
>> Cc: Jani Nikula <jani.nikula at intel.com>
>> Cc: Shashank Sharma <shashank.sharma at intel.com>
>> Signed-off-by: Animesh Manna <animesh.manna at intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_dsb.c | 22 ++++++++++++++++------
>> drivers/gpu/drm/i915/display/intel_dsb.h | 1 +
>> 2 files changed, 17 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
>> b/drivers/gpu/drm/i915/display/intel_dsb.c
>> index 853685751540..b951a6b5264a 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
>> @@ -78,7 +78,12 @@ intel_dsb_get(struct intel_crtc *crtc)
>> struct intel_dsb *dsb = &crtc->dsb;
>> intel_wakeref_t wakeref;
>> - if ((!HAS_DSB(i915)) || dsb->cmd_buf)
>> + if (!HAS_DSB(i915))
>> + return dsb;
>> +
>> + atomic_inc(&dsb->refcount);
>> +
>
> As discussed we are not solving any problem with reference counting,
> rather, we are adding a complexity here. It may be useful, when we are
> extending single instance of DSB to DSB pool but not right now.
>
> I would say we drop this patch all together, and just have the simple
> implementation now.
Tried to have synchronization in single thread multiple user scenario
through ref-count mechanism, but can be taken in phased approach in future.
Regards,
Animesh
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