[Intel-gfx] [PATCH] drm/i915: include GTT page-size info in error state

[Chris Wilson]

Quoting Matthew Auld (2019-09-09 18:16:46)
> It might prove useful in the future to know if the vma is utilising
> huge-GTT-pages. Related to this is the GTT cache, where there is some HW
> "quirkiness" where it must be disabled if using 2M pages, so include
> that for good measure.
> 
> Suggested-by: Chris Wilson <chris at chris-wilson.co.uk>
> Signed-off-by: Matthew Auld <matthew.auld at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> ---
> @@ -127,6 +128,7 @@ struct i915_gpu_state {
>                 struct drm_i915_error_object {
>                         u64 gtt_offset;
>                         u64 gtt_size;
> +                       u32 gtt_page_sizes;

I keep wondering how long until we need unsigned long, but this fits
with unsigned int pages_sizes.gtt

Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris