[Intel-gfx] [PATCH v2 10/13] drm/i915/tgl: Check the UC health of tc controllers after power on

[Souza, Jose]

On Thu, 2019-09-19 at 23:25 +0300, Imre Deak wrote:
> On Thu, Sep 19, 2019 at 10:25:33PM +0300, Imre Deak wrote:
> > On Wed, Sep 18, 2019 at 05:07:23PM -0700, José Roberto de Souza
> > wrote:
> > > New step added for TGL, required for us to check the TC
> > > microcontroller health after power on TC aux.
> > > 
> > > BSpec: 49294
> > > 
> > > Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
> > 
> > Reviewed-by: Imre Deak <imre.deak at intel.com>
> > 
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_display_power.c | 13
> > > +++++++++++++
> > >  1 file changed, 13 insertions(+)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c
> > > b/drivers/gpu/drm/i915/display/intel_display_power.c
> > > index ce88a27229ef..f1186bc23542 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> > > @@ -562,6 +562,8 @@ static void
> > > icl_tc_port_assert_ref_held(struct drm_i915_private *dev_priv,
> > >  
> > >  #endif
> > >  
> > > +#define TGL_AUX_PW_TO_TC_PORT(pw_idx)	((pw_idx) -
> > > TGL_PW_CTL_IDX_AUX_TC1)
> > > +
> > >  static void
> > >  icl_tc_phy_aux_power_well_enable(struct drm_i915_private
> > > *dev_priv,
> > >  				 struct i915_power_well *power_well)
> > > @@ -578,6 +580,17 @@ icl_tc_phy_aux_power_well_enable(struct
> > > drm_i915_private *dev_priv,
> > >  	I915_WRITE(DP_AUX_CH_CTL(aux_ch), val);
> > >  
> > >  	hsw_power_well_enable(dev_priv, power_well);
> > > +
> > > +	if (INTEL_GEN(dev_priv) >= 12 && !power_well->desc-
> > > >hsw.is_tc_tbt) {
> > > +		enum tc_port tc_port;
> > > +
> > > +		tc_port = TGL_AUX_PW_TO_TC_PORT(power_well->desc-
> > > >hsw.idx);
> > > +		I915_WRITE(HIP_INDEX_REG(tc_port),
> > > HIP_INDEX_VAL(tc_port, 0x2));
> 
> Nit: instead of hard-coding the upper bits the DKL PHY regs should be
> defined as
> the full address (for instance base + 0x236C for DKL_CMN_UC_DW_27)
> and
> use helpers here to get the low/high bits from the full address.

Good idea, depending of how much work will be needed to the current
patches be merged I will do that in the current patches otherwise will
do top.

> 
> > > +
> > > +		if (intel_de_wait_for_set(dev_priv,
> > > DKL_CMN_UC_DW_27(tc_port),
> > > +					  DKL_CMN_UC_DW27_UC_HEALTH,
> > > 1))
> > > +			DRM_WARN("Timeout waiting TC uC health\n");
> > > +	}
> > >  }
> > >  
> > >  static void
> > > -- 
> > > 2.23.0
> > > 
> > > _______________________________________________
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> > > Intel-gfx at lists.freedesktop.org
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