[Intel-gfx] [PATCH 2/2] drm/i915/tgl: Swap engines for rc6/powersaving

[Chris Wilson]

Disable rc6 to re-enable all engines. It seems that the multi-engine
machine lockup is tied to rc6; disabling it makes a gem-sync --run
basic-store-all survive for a few hours, whereas without we expect it to
die within seconds. The only question is how does CI fare with the
exchange?

For testing purpose, having all the engines is more valuable than
enabling powersaving (both have to work of course, but many more features
depend on having the extra engines).

Note disabling rc6 has the knock-on effect of disabling our runtime
power management -- the issue might not be local to our rc6 programming.

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index fe6941c8fc99..698116276441 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -797,7 +797,7 @@ static const struct intel_device_info intel_tigerlake_12_info = {
 	.display.has_modular_fia = 1,
 	.engine_mask =
 		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
-	.engine_mask = BIT(RCS0), /* XXX reduced for debugging */
+	.has_rc6 = false, /* XXX disabled for debugging */
 };
 
 #undef GEN
-- 
2.23.0