[Intel-gfx] [PATCH v3 4/9] drm/i915/tgl: Add dkl phy programming sequences

[Lucas De Marchi]

On Tue, Sep 24, 2019 at 4:21 PM Souza, Jose <jose.souza at intel.com> wrote:
>
> On Tue, 2019-09-24 at 16:00 +0300, Imre Deak wrote:
> > On Mon, Sep 23, 2019 at 03:02:54PM -0700, Lucas De Marchi wrote:
> One odd thing that I notice is that we use port instead of tc_port in
> most MG registers, those MG registers uses a macro that subtract port
> and PORT_C to get the right register, thinking in send a patch changing
> all of those to receive as parameter tc_port to make it consistent,
> what you guys think?

I think it's a leftover from previous implementation. For use them in
TGL we do have to change
to tc_port since TC ports in TGL start with PORT_D.

Lucas De Marchi