[Intel-gfx] [PATCH] drm/i915/tgl: Make Wa_14010229206 permanent
Matt Roper
matthew.d.roper at intel.com
Thu Apr 2 22:49:56 UTC 2020
On Thu, Mar 26, 2020 at 04:49:55PM -0700, Swathi Dhanavanthri wrote:
> This workaround now applies to all steppings, not just A0.
> Wa_1409085225 is a temporary A0-only W/A however it is
> identical to Wa_14010229206 and hence the combined workaround
> is made permanent.
> Bspec: 52890
>
> Signed-off-by: Swathi Dhanavanthri <swathi.dhanavanthri at intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 11 +++++------
> 1 file changed, 5 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index e96cc7fa0936..c3c42cf614a9 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1380,12 +1380,6 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
> GEN7_FF_THREAD_MODE,
> GEN12_FF_TESSELATION_DOP_GATE_DISABLE);
>
> - /*
> - * Wa_1409085225:tgl
> - * Wa_14010229206:tgl
> - */
> - wa_masked_en(wal, GEN9_ROW_CHICKEN4, GEN12_DISABLE_TDL_PUSH);
> -
> /* Wa_1408615072:tgl */
> wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
> VSUNIT_CLKGATE_DIS_TGL);
> @@ -1403,6 +1397,11 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
> wa_masked_en(wal,
> GEN9_CS_DEBUG_MODE1,
> FF_DOP_CLOCK_GATE_DISABLE);
There should be a blank line here, but I can add that while applying.
Reviewed-by: Matt Roper <matthew.d.roper at intel.com>
Looks like CI results are back and clean now, so applied to dinq.
Thanks for the patch.
Matt
> + /*
> + * Wa_1409085225:tgl
> + * Wa_14010229206:tgl
> + */
> + wa_masked_en(wal, GEN9_ROW_CHICKEN4, GEN12_DISABLE_TDL_PUSH);
> }
>
> if (IS_GEN(i915, 11)) {
> --
> 2.20.1
>
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--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
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