[Intel-gfx] [PATCH] drm/i915: Drop runtime-pm assert from vgpu io accessors
Zhenyu Wang
zhenyuw at linux.intel.com
Wed Aug 19 08:32:59 UTC 2020
ping for committing?
On 2020.08.12 10:06:31 +0800, Zhenyu Wang wrote:
> On 2020.08.11 10:25:32 +0100, Chris Wilson wrote:
> > The "mmio" writes into vgpu registers are simple memory traps from the
> > guest into the host. We do not need to assert in the guest that the
> > device is awake for the io as we do not write to the device itself.
> >
> > However, over time we have refactored all the mmio accessors with the
> > result that the vgpu reuses the gen2 accessors and so inherits the
> > assert for runtime-pm of the native device. The assert though has
> > actually been there since commit 3be0bf5acca6 ("drm/i915: Create vGPU
> > specific MMIO operations to reduce traps").
> >
> > References: 3be0bf5acca6 ("drm/i915: Create vGPU specific MMIO operations to reduce traps")
> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > Cc: Yan Zhao <yan.y.zhao at intel.com>
> > Cc: Zhenyu Wang <zhenyuw at linux.intel.com>
> > ---
>
> Reviewed-by: Zhenyu Wang <zhenyuw at linux.intel.com>
>
> Thanks!
>
> > drivers/gpu/drm/i915/intel_uncore.c | 27 ++++++++++++++++++++++++++-
> > 1 file changed, 26 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> > index f5edee17902a..6d3310794d0f 100644
> > --- a/drivers/gpu/drm/i915/intel_uncore.c
> > +++ b/drivers/gpu/drm/i915/intel_uncore.c
> > @@ -1209,6 +1209,18 @@ unclaimed_reg_debug(struct intel_uncore *uncore,
> > spin_unlock(&uncore->debug->lock);
> > }
> >
> > +#define __vgpu_read(x) \
> > +static u##x \
> > +vgpu_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { \
> > + u##x val = __raw_uncore_read##x(uncore, reg); \
> > + trace_i915_reg_rw(false, reg, val, sizeof(val), trace); \
> > + return val; \
> > +}
> > +__vgpu_read(8)
> > +__vgpu_read(16)
> > +__vgpu_read(32)
> > +__vgpu_read(64)
> > +
> > #define GEN2_READ_HEADER(x) \
> > u##x val = 0; \
> > assert_rpm_wakelock_held(uncore->rpm);
> > @@ -1414,6 +1426,16 @@ __gen_reg_write_funcs(gen8);
> > #undef GEN6_WRITE_FOOTER
> > #undef GEN6_WRITE_HEADER
> >
> > +#define __vgpu_write(x) \
> > +static void \
> > +vgpu_write##x(struct intel_uncore *uncore, i915_reg_t reg, u##x val, bool trace) { \
> > + trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \
> > + __raw_uncore_write##x(uncore, reg, val); \
> > +}
> > +__vgpu_write(8)
> > +__vgpu_write(16)
> > +__vgpu_write(32)
> > +
> > #define ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, x) \
> > do { \
> > (uncore)->funcs.mmio_writeb = x##_write8; \
> > @@ -1735,7 +1757,10 @@ static void uncore_raw_init(struct intel_uncore *uncore)
> > {
> > GEM_BUG_ON(intel_uncore_has_forcewake(uncore));
> >
> > - if (IS_GEN(uncore->i915, 5)) {
> > + if (intel_vgpu_active(uncore->i915)) {
> > + ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, vgpu);
> > + ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, vgpu);
> > + } else if (IS_GEN(uncore->i915, 5)) {
> > ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, gen5);
> > ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, gen5);
> > } else {
> > --
> > 2.20.1
> >
>
> --
>
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