[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/gt: Tweak gen7 xcs flushing

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915/gt: Tweak gen7 xcs flushing
URL   : https://patchwork.freedesktop.org/series/73068/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
be0c11af059b drm/i915/gt: Tweak gen7 xcs flushing
-:51: WARNING:LONG_LINE: line over 100 characters
#51: FILE: drivers/gpu/drm/i915/gt/intel_ring_submission.c:472:
+	GEM_BUG_ON(offset_in_page(i915_request_active_timeline(rq)->hwsp_offset) != I915_GEM_HWS_SEQNO_ADDR);

total: 0 errors, 1 warnings, 0 checks, 47 lines checked
ffb456a12e2a drm/i915/gt: Set the PP_DIR registers upon enabling ring submission
9a7a58a2f90a drm/i915/gt: Stop invalidating the PD cachelines for gen7