[Intel-gfx] [PATCH 6/9] drm/i915/dsb: Inline DSB_CTRL writes into intel_dsb_commit()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala at linux.intel.com>

No point in having these wrappers for a simple DSB_CTRL write.
Inline them into intel_dsb_commit().

Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dsb.c | 64 +++++-------------------
 1 file changed, 13 insertions(+), 51 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
index a46a8f499e0e..53759bf7a451 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -43,40 +43,6 @@ static inline bool is_dsb_busy(struct intel_dsb *dsb)
 	return intel_de_read(dev_priv, DSB_CTRL(pipe, dsb->id)) & DSB_STATUS;
 }
 
-static inline bool intel_dsb_enable_engine(struct intel_dsb *dsb)
-{
-	struct intel_crtc *crtc = container_of(dsb, typeof(*crtc), dsb);
-	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
-	enum pipe pipe = crtc->pipe;
-
-	if (is_dsb_busy(dsb)) {
-		DRM_ERROR("DSB engine is busy.\n");
-		return false;
-	}
-
-	intel_de_write(dev_priv, DSB_CTRL(pipe, dsb->id), DSB_ENABLE);
-	intel_de_posting_read(dev_priv, DSB_CTRL(pipe, dsb->id));
-
-	return true;
-}
-
-static inline bool intel_dsb_disable_engine(struct intel_dsb *dsb)
-{
-	struct intel_crtc *crtc = container_of(dsb, typeof(*crtc), dsb);
-	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
-	enum pipe pipe = crtc->pipe;
-
-	if (is_dsb_busy(dsb)) {
-		DRM_DEBUG_KMS("DSB engine is busy.\n");
-		return false;
-	}
-
-	intel_de_write(dev_priv, DSB_CTRL(pipe, dsb->id), 0);
-	intel_de_posting_read(dev_priv, DSB_CTRL(pipe, dsb->id));
-
-	return true;
-}
-
 /**
  * intel_dsb_get() - Allocate DSB context and return a DSB instance.
  * @crtc: intel_crtc structure to get pipe info.
@@ -306,36 +272,32 @@ void intel_dsb_commit(struct intel_dsb *dsb)
 	if (!dsb->free_pos)
 		return;
 
-	if (!intel_dsb_enable_engine(dsb))
-		goto reset;
-
-	if (is_dsb_busy(dsb)) {
-		DRM_ERROR("HEAD_PTR write failed - dsb engine is busy.\n");
-		goto reset;
-	}
-	intel_de_write(dev_priv, DSB_HEAD(pipe, dsb->id),
-		       i915_ggtt_offset(dsb->vma));
-
 	tail = ALIGN(dsb->free_pos * 4, CACHELINE_BYTES);
 	if (tail > dsb->free_pos * 4)
 		memset(&dsb->cmd_buf[dsb->free_pos], 0,
 		       (tail - dsb->free_pos * 4));
 
 	if (is_dsb_busy(dsb)) {
-		DRM_ERROR("TAIL_PTR write failed - dsb engine is busy.\n");
+		DRM_ERROR("DSB engine is busy.\n");
 		goto reset;
 	}
-	DRM_DEBUG_KMS("DSB execution started - head 0x%x, tail 0x%x\n",
-		      i915_ggtt_offset(dsb->vma), tail);
+
+	intel_de_write(dev_priv, DSB_CTRL(pipe, dsb->id),
+		       DSB_ENABLE);
+	intel_de_write(dev_priv, DSB_HEAD(pipe, dsb->id),
+		       i915_ggtt_offset(dsb->vma));
 	intel_de_write(dev_priv, DSB_TAIL(pipe, dsb->id),
 		       i915_ggtt_offset(dsb->vma) + tail);
-	if (wait_for(!is_dsb_busy(dsb), 1)) {
+
+	DRM_DEBUG_KMS("DSB execution started - head 0x%x, tail 0x%x\n",
+		      i915_ggtt_offset(dsb->vma),
+		      i915_ggtt_offset(dsb->vma) + tail);
+
+	if (wait_for(!is_dsb_busy(dsb), 1))
 		DRM_ERROR("Timed out waiting for DSB workload completion.\n");
-		goto reset;
-	}
 
 reset:
 	dsb->free_pos = 0;
 	dsb->ins_start_offset = 0;
-	intel_dsb_disable_engine(dsb);
+	intel_de_write(dev_priv, DSB_CTRL(pipe, dsb->id), 0);
 }
-- 
2.24.1