[Intel-gfx] [PATCH v4 04/11] drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3.

[Maarten Lankhorst]

Op 01-05-2020 om 01:09 schreef Manasi Navare:
> From: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
>
> Small changes to intel_dp_mode_valid(), allow listing modes that
> can only be supported in the bigjoiner configuration, which is
> not supported yet.
>
> eDP does not support bigjoiner, so do not expose bigjoiner only
> modes on the eDP port.
>
> Changes since v1:
> - Disallow bigjoiner on eDP.
> Changes since v2:
> - Rename intel_dp_downstream_max_dotclock to intel_dp_max_dotclock,
>   and split off the downstream and source checking to its own function.
>   (Ville)
> v3:
> * Rebase (Manasi)
>
> Signed-off-by: Manasi Navare <manasi.d.navare at intel.com>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 117 ++++++++++++++++++------
>  1 file changed, 89 insertions(+), 28 deletions(-)

Hey,

With this patch, the 8k mode is still rejected because h limits are not increased on DP:
[ 3762.916623] i915 0000:00:02.0: [drm:intel_dp_dsc_get_output_bpp [i915]] Max link bpp: 12
[ 3762.916663] i915 0000:00:02.0: [drm:intel_dp_dsc_get_output_bpp [i915]] Max small joiner bpp: 16
[ 3762.916702] [drm:intel_dp_dsc_get_output_bpp [i915]] Max big joiner bpp: 14
[ 3762.916706] [drm:drm_mode_debug_printmodeline] Modeline "7680x4320": 60 2068660 7680 7688 7720 7760 4320 4429 4437 4443 0x48 0x9
[ 3762.916709] [drm:drm_mode_prune_invalid] Not using 7680x4320 mode: H_ILLEGAL

I would suggest tweaking intel_mode_valid_max_plane_size to make this work. :)

~Maarten