[Intel-gfx] [PATCH] drm/i915/ehl: Restrict w/a 1607087056 for EHL/JSL

[Souza, Jose]

On Tue, 2020-05-12 at 11:00 -0700, Swathi Dhanavanthri wrote:
> This w/a is fixed in B0 stepping and needs to be restricted for
> A0 stepping only.
> Bspec: 33451
> 

Reviewed-by: José Roberto de Souza <jose.souza at intel.com>

> Signed-off-by: Swathi Dhanavanthri <swathi.dhanavanthri at intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_workarounds.c | 11 +++++++----
>  drivers/gpu/drm/i915/i915_drv.h             |  5 +++++
>  2 files changed, 12 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index aa90e6b7a118..90a2b9e399b0 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -917,10 +917,13 @@ icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>  		    GAMT_CHKN_BIT_REG,
>  		    GAMT_CHKN_DISABLE_L3_COH_PIPE);
>  
> -	/* Wa_1607087056:icl */
> -	wa_write_or(wal,
> -		    SLICE_UNIT_LEVEL_CLKGATE,
> -		    L3_CLKGATE_DIS | L3_CR2X_CLKGATE_DIS);
> +	/* Wa_1607087056:icl,ehl,jsl */
> +	if (IS_ICELAKE(i915) ||
> +	    IS_EHL_REVID(i915, EHL_REVID_A0, EHL_REVID_A0)) {
> +		wa_write_or(wal,
> +			    SLICE_UNIT_LEVEL_CLKGATE,
> +			    L3_CLKGATE_DIS | L3_CR2X_CLKGATE_DIS);
> +	}
>  }
>  
>  static void
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 8656f1e0d97f..98dc8cdf2c38 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1517,6 +1517,11 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  #define IS_ICL_REVID(p, since, until) \
>  	(IS_ICELAKE(p) && IS_REVID(p, since, until))
>  
> +#define EHL_REVID_A0            0x0
> +
> +#define IS_EHL_REVID(p, since, until) \
> +	(IS_ELKHARTLAKE(p) && IS_REVID(p, since, until))
> +
>  #define TGL_REVID_A0		0x0
>  #define TGL_REVID_B0		0x1
>  #define TGL_REVID_C0		0x2