[Intel-gfx] [PATCH v5 1/3] drm/dp: DRM DP helper for reading Ignore MSA from DPCD

Manasi Navare manasi.d.navare at intel.com
Wed May 13 05:34:29 UTC 2020

DP sink device sets the Ignore MSA bit in its
DP_DOWNSTREAM_PORT_COUNT register to indicate its ability to
ignore the MSA video timing parameters and its ability to support
seamless video timing change over a range of timing exposed by
DisplayID and EDID.
This is required for the sink to indicate that it is Adaptive sync

* Fi the typo in commit message (Manasi)
* Rename to describe what the function does (Jani Nikula)

Cc: Jani Nikula <jani.nikula at linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
Cc: Harry Wentland <harry.wentland at amd.com>
Cc: Nicholas Kazlauskas <Nicholas.Kazlauskas at amd.com>
Signed-off-by: Manasi Navare <manasi.d.navare at intel.com>
Reviewed-by: Harry Wentland <harry.wentland at amd.com>
 include/drm/drm_dp_helper.h | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 6c4b53dcb851..d43b5c9705d4 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -1454,6 +1454,14 @@ drm_dp_alternate_scrambler_reset_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+/* Ignore MSA timing for Adaptive Sync support on DP 1.4 */
+static inline bool
+drm_dp_sink_can_do_video_without_timing_msa(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+	return dpcd[DP_DOWN_STREAM_PORT_COUNT] &
  * DisplayPort AUX channel

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