[Intel-gfx] [PATCH 2/2] drm/i915/gt: Correct surface base address

[Mika Kuoppala]

Chris Wilson <chris at chris-wilson.co.uk> writes:

> The surface_state_base is an offset into the batch, so we need to pass
> the correct batch address for STATE_BASE_ADDRESS.
>
> Fixes: 47f8253d2b89 ("drm/i915/gen7: Clear all EU/L3 residual contexts")
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> Cc: Prathap Kumar Valsan <prathap.kumar.valsan at intel.com>
> Cc: Akeem G Abodunrin <akeem.g.abodunrin at intel.com>

Reviewed-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>

> ---
>  drivers/gpu/drm/i915/gt/gen7_renderclear.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/gen7_renderclear.c b/drivers/gpu/drm/i915/gt/gen7_renderclear.c
> index e403eb046a43..de575fdb033f 100644
> --- a/drivers/gpu/drm/i915/gt/gen7_renderclear.c
> +++ b/drivers/gpu/drm/i915/gt/gen7_renderclear.c
> @@ -240,7 +240,7 @@ gen7_emit_state_base_address(struct batch_chunk *batch,
>  	/* general */
>  	*cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY;
>  	/* surface */
> -	*cs++ = batch_addr(batch) | surface_state_base | BASE_ADDRESS_MODIFY;
> +	*cs++ = (batch_addr(batch) + surface_state_base) | BASE_ADDRESS_MODIFY;
>  	/* dynamic */
>  	*cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY;
>  	/* indirect */
> -- 
> 2.20.1