[Intel-gfx] [PATCH 2/2] drm/i915/gt: Correct surface base address

[Chris Wilson]

Quoting Mika Kuoppala (2021-02-10 10:50:18)
> Chris Wilson <chris at chris-wilson.co.uk> writes:
> 
> > The surface_state_base is an offset into the batch, so we need to pass
> > the correct batch address for STATE_BASE_ADDRESS.
> >
> > Fixes: 47f8253d2b89 ("drm/i915/gen7: Clear all EU/L3 residual contexts")
> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> > Cc: Prathap Kumar Valsan <prathap.kumar.valsan at intel.com>
> > Cc: Akeem G Abodunrin <akeem.g.abodunrin at intel.com>
> 
> Reviewed-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>

Compared against https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7571/index.html
I think we've found our suspect.
-Chris