[Intel-gfx] [PATCH i-g-t] i915/gem_ctx_engine: Prerun the spinner to bind offsets before use
Chris Wilson
chris at chris-wilson.co.uk
Tue Jan 5 22:23:17 UTC 2021
Set the spinner and target execbuf up before we start the test; this not
only saves time in recreating the spinner on each loop, but it ensures
that we don't antagonise ourselves by fighting over GTT offsets.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota at intel.com>
---
tests/i915/gem_ctx_engines.c | 25 +++++++++++++++++--------
1 file changed, 17 insertions(+), 8 deletions(-)
diff --git a/tests/i915/gem_ctx_engines.c b/tests/i915/gem_ctx_engines.c
index eab0cc40a..6fbd3cdb0 100644
--- a/tests/i915/gem_ctx_engines.c
+++ b/tests/i915/gem_ctx_engines.c
@@ -333,31 +333,38 @@ static void execute_one(int i915)
};
const uint32_t bbe = MI_BATCH_BUFFER_END;
const struct intel_execution_engine2 *e;
+ igt_spin_t *spin;
+
+ /* Prewarm the spinner */
+ spin = igt_spin_new(i915, .ctx = param.ctx_id,
+ .flags = (IGT_SPIN_NO_PREEMPTION |
+ IGT_SPIN_POLL_RUN));
gem_write(i915, obj.handle, 0, &bbe, sizeof(bbe));
/* Unadulterated I915_EXEC_DEFAULT should work */
execbuf.flags = 0;
gem_execbuf(i915, &execbuf);
+ obj.flags |= EXEC_OBJECT_PINNED;
+
+ igt_spin_end(spin);
gem_sync(i915, obj.handle);
__for_each_physical_engine(i915, e) {
struct drm_i915_gem_busy busy = { .handle = obj.handle };
- for (int i = -1; i <= I915_EXEC_RING_MASK; i++) {
- igt_spin_t *spin;
+ igt_debug("Testing [%s...]\n", e->name);
+ for (int i = -1; i <= I915_EXEC_RING_MASK; i++) {
memset(&engines, 0, sizeof(engines));
engine_class(&engines, 0) = e->class;
engine_instance(&engines, 0) = e->instance;
param.size = offsetof(typeof(engines), engines[1]);
gem_context_set_param(i915, ¶m);
- spin = igt_spin_new(i915,
- .ctx = param.ctx_id,
- .engine = 0,
- .flags = (IGT_SPIN_NO_PREEMPTION |
- IGT_SPIN_POLL_RUN));
+ gem_sync(i915, spin->handle);
+ igt_spin_reset(spin);
+ gem_execbuf(i915, &spin->execbuf);
igt_debug("Testing with map of %d engines\n", i + 1);
memset(&engines.engines, -1, sizeof(engines.engines));
@@ -382,7 +389,7 @@ static void execute_one(int i915)
igt_assert_eq(batch_busy(busy.busy),
i != -1 ? 1 << e->class : 0);
- igt_spin_free(i915, spin);
+ igt_spin_end(spin);
gem_sync(i915, obj.handle);
do_ioctl(i915, DRM_IOCTL_I915_GEM_BUSY, &busy);
@@ -396,6 +403,8 @@ static void execute_one(int i915)
execbuf.flags = 0;
gem_execbuf(i915, &execbuf);
+ igt_spin_free(i915, spin);
+
gem_close(i915, obj.handle);
gem_context_destroy(i915, param.ctx_id);
}
--
2.30.0
More information about the Intel-gfx
mailing list