[Intel-gfx] [PATCH 29/56] drm/i915/adl_p: Load DMC
Matt Roper
matthew.d.roper at intel.com
Thu Mar 11 22:36:05 UTC 2021
From: Anusha Srivatsa <anusha.srivatsa at intel.com>
Load DMC v2.08 on ADLP. The release notes mention that
this version enables few power savings features.
Cc: Lucas De Marchi <lucas.demarchi at intel.com>
Cc: Clint Taylor <clinton.a.taylor at intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa at intel.com>
Signed-off-by: Clinton Taylor <Clinton.A.Taylor at intel.com>
Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
---
drivers/gpu/drm/i915/display/intel_csr.c | 10 +++++++++-
.../gpu/drm/i915/display/intel_display_power.c | 16 +++++++++++++++-
2 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_csr.c b/drivers/gpu/drm/i915/display/intel_csr.c
index 82360593b0a6..863e4566e645 100644
--- a/drivers/gpu/drm/i915/display/intel_csr.c
+++ b/drivers/gpu/drm/i915/display/intel_csr.c
@@ -40,6 +40,10 @@
#define GEN12_CSR_MAX_FW_SIZE ICL_CSR_MAX_FW_SIZE
+#define ADLP_CSR_PATH "i915/adlp_dmc_ver2_08.bin"
+#define ADLP_CSR_VERSION_REQUIRED CSR_VERSION(2, 8)
+MODULE_FIRMWARE(ADLP_CSR_PATH);
+
#define ADLS_CSR_PATH "i915/adls_dmc_ver2_01.bin"
#define ADLS_CSR_VERSION_REQUIRED CSR_VERSION(2, 1)
MODULE_FIRMWARE(ADLS_CSR_PATH);
@@ -693,7 +697,11 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
*/
intel_csr_runtime_pm_get(dev_priv);
- if (IS_ALDERLAKE_S(dev_priv)) {
+ if (IS_ALDERLAKE_P(dev_priv)) {
+ csr->fw_path = ADLP_CSR_PATH;
+ csr->required_version = ADLP_CSR_VERSION_REQUIRED;
+ csr->max_fw_size = GEN12_CSR_MAX_FW_SIZE;
+ } else if (IS_ALDERLAKE_S(dev_priv)) {
csr->fw_path = ADLS_CSR_PATH;
csr->required_version = ADLS_CSR_VERSION_REQUIRED;
csr->max_fw_size = GEN12_CSR_MAX_FW_SIZE;
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 8bb5203dd2da..3b30604e850a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -4953,7 +4953,21 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
int requested_dc;
int max_dc;
- if (IS_DG1(dev_priv))
+ if (!HAS_DISPLAY(dev_priv))
+ return 0;
+
+ if (DISPLAY_VER(dev_priv) == 13)
+ /*
+ * FIXME: We need to disable DC-states for two reasons:
+ *
+ * - Although not documented in the bspec, we've been told
+ * that we need to upload Pipe DMC firmwares in addition
+ * to the main DMC firmware for DC5 to work properly.
+ * We need proper bspec documentation before we can handle
+ * this.
+ */
+ max_dc = 0;
+ else if (IS_DG1(dev_priv))
max_dc = 3;
else if (DISPLAY_VER(dev_priv) >= 12)
max_dc = 4;
--
2.25.4
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