[Intel-gfx] [PATCH v3 00/48] Alder Lake-P Support
Matt Roper
matthew.d.roper at intel.com
Sat May 8 02:27:32 UTC 2021
The previous version of this series was here:
https://patchwork.freedesktop.org/series/87897/#rev2
https://lists.freedesktop.org/archives/intel-gfx/2021-March/263029.html
Aside from general rebasing, the main changes in this version are
improvements to the Type-C, PSR, and DSC code.
Cc: Clinton Taylor <clinton.a.taylor at intel.com>
Cc: Lucas De Marchi <lucas.demarchi at intel.com>
Cc: José Roberto de Souza <jose.souza at intel.com>
Animesh Manna (3):
drm/i915/bigjoiner: Mode validation with uncompressed pipe joiner
drm/i915/bigjoiner: Avoid dsc_compute_config for uncompressed
bigjoiner
drm/i915/bigjoiner: atomic commit changes for uncompressed joiner
Anusha Srivatsa (5):
drm/i915/adl_p: Setup ports/phys
drm/i915/adl_p: Add cdclk support for ADL-P
drm/i915/adl_p: Add PLL Support
drm/i915/adlp: Add PIPE_MISC2 programming
drm/i915/adl_p: Update memory bandwidth parameters
Clinton Taylor (1):
drm/i915/adl_p: Add PCH support
Gwan-gyeong Mun (4):
drm/i915/display: Replace dc3co_enabled with dc3co_exitline on
intel_psr struct
drm/i915/display: Remove a redundant function argument from
intel_psr_enable_source()
drm/i915/display: Add PSR interrupt error check function
drm/i915/display: Introduce new intel_psr_pause/resume function
Imre Deak (1):
drm/i915/adl_p: Program DP/HDMI link rate to DDI_BUF_CTL
José Roberto de Souza (10):
drm/i915/xelpd: Provide port/phy mapping for vbt
drm/i915/display/tc: Rename safe_mode functions ownership
drm/i915/adl_p: Handle TC cold
drm/i915/adl_p: Implement TC sequences
drm/i915/adl_p: Enable modular fia
drm/i915/adl_p: Don't config MBUS and DBUF during display
initialization
drm/i915/adl_p: Add IPs stepping mapping
drm/i915/adl_p: Implement Wa_22011091694
drm/i915/display/adl_p: Implement Wa_22011320316
drm/i915/adl_p: Disable CCS on a-step (Wa_22011186057)
Manasi Navare (1):
drm/i915/xelpd: Add VRR guardband for VRR CTL
Matt Roper (10):
drm/i915/xelpd: Handle proper AUX interrupt bits
drm/i915/xelpd: Enhanced pipe underrun reporting
drm/i915/xelpd: Define plane capabilities
drm/i915/xelpd: Handle new location of outputs D and E
drm/i915/xelpd: Add XE_LPD power wells
drm/i915/xelpd: Increase maximum watermark lines to 255
drm/i915/xelpd: Required bandwidth increases when VT-d is active
drm/i915/xelpd: Add Wa_14011503030
drm/i915/adl_p: Add dedicated SAGV watermarks
drm/i915/adl_p: Extend PLANE_WM bits for blocks & lines
Mika Kahola (3):
drm/i915/adl_p: Tx escape clock with DSI
drm/i915/adl_p: Define and use ADL-P specific DP translation tables
drm/i915/adl_p: Enable/disable loadgen sharing
Umesh Nerlige Ramappa (1):
drm/i915/perf: Enable OA formats for ADL_P
Vandita Kulkarni (7):
drm/i915/display/dsc: Refactor intel_dp_dsc_compute_bpp
drm/i915/xelpd: Support DP1.4 compression BPPs
drm/i915: Get slice height before computing rc params
drm/i915/xelpd: Calculate VDSC RC parameters
drm/i915/xelpd: Add rc_qp_table for rcparams calculation
drm/i915/adl_p: Add ddb allocation support
drm/i915/adl_p: MBUS programming
Ville Syrjälä (2):
drm/i915: Introduce MBUS relative dbuf offsets
drm/i915: Move intel_modeset_all_pipes()
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/icl_dsi.c | 21 +-
drivers/gpu/drm/i915/display/intel_atomic.c | 20 +
drivers/gpu/drm/i915/display/intel_atomic.h | 1 +
drivers/gpu/drm/i915/display/intel_bios.c | 48 +-
drivers/gpu/drm/i915/display/intel_bw.c | 5 +-
drivers/gpu/drm/i915/display/intel_cdclk.c | 98 ++--
drivers/gpu/drm/i915/display/intel_ddi.c | 91 +++-
.../drm/i915/display/intel_ddi_buf_trans.c | 34 ++
.../drm/i915/display/intel_ddi_buf_trans.h | 4 +
drivers/gpu/drm/i915/display/intel_display.c | 127 ++++-
drivers/gpu/drm/i915/display/intel_display.h | 9 +
.../drm/i915/display/intel_display_debugfs.c | 6 +
.../drm/i915/display/intel_display_power.c | 437 +++++++++++++++++-
.../drm/i915/display/intel_display_power.h | 9 +
.../drm/i915/display/intel_display_types.h | 5 +-
drivers/gpu/drm/i915/display/intel_dp.c | 75 +--
drivers/gpu/drm/i915/display/intel_dp_aux.c | 14 +-
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 69 ++-
.../drm/i915/display/intel_fifo_underrun.c | 57 ++-
drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c | 131 ++++--
drivers/gpu/drm/i915/display/intel_psr.h | 2 +
.../gpu/drm/i915/display/intel_qp_tables.c | 309 +++++++++++++
drivers/gpu/drm/i915/display/intel_tc.c | 161 ++++++-
drivers/gpu/drm/i915/display/intel_vdsc.c | 148 +++++-
drivers/gpu/drm/i915/display/intel_vdsc.h | 2 +
drivers/gpu/drm/i915/display/intel_vrr.c | 56 ++-
.../drm/i915/display/skl_universal_plane.c | 31 +-
drivers/gpu/drm/i915/i915_drv.h | 13 +
drivers/gpu/drm/i915/i915_irq.c | 33 +-
drivers/gpu/drm/i915/i915_irq.h | 1 +
drivers/gpu/drm/i915/i915_pci.c | 1 +
drivers/gpu/drm/i915/i915_perf.c | 1 +
drivers/gpu/drm/i915/i915_reg.h | 178 +++++--
drivers/gpu/drm/i915/intel_device_info.c | 2 +-
drivers/gpu/drm/i915/intel_pch.c | 6 +-
drivers/gpu/drm/i915/intel_pch.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 330 ++++++++++++-
drivers/gpu/drm/i915/intel_pm.h | 2 +-
drivers/gpu/drm/i915/intel_step.c | 12 +-
41 files changed, 2264 insertions(+), 289 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_qp_tables.c
--
2.25.4
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