[Intel-gfx] [v5, 13/14] drm/i915/gsc: allocate extended operational memory in LMEM

Teres Alexis, Alan Previn alan.previn.teres.alexis at intel.com
Tue Aug 2 17:29:36 UTC 2022


Looks good, just a minor nit.

Reviewed-by: Alan Previn <alan.previn.teres.alexis at intel.com>


On Wed, 2022-07-06 at 14:43 +0300, Alexander Usyskin wrote:
> From: Tomas Winkler <tomas.winkler at intel.com>
> 
> GSC requires more operational memory than available on chip.
> Reserve 4M of LMEM for GSC operation. The memory is provided to the
> GSC as struct resource to the auxiliary data of the child device.
> 
> Cc: Alan Previn <alan.previn.teres.alexis at intel.com>
> Signed-off-by: Tomas Winkler <tomas.winkler at intel.com>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> Signed-off-by: Alexander Usyskin <alexander.usyskin at intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_gsc.c | 92 ++++++++++++++++++++++++++---
>  drivers/gpu/drm/i915/gt/intel_gsc.h |  3 +
>  2 files changed, 88 insertions(+), 7 deletions(-)
> 
> +	if (def->lmem_size) {
> +		dev_dbg(&pdev->dev, "setting up GSC lmem\n");
> 
NIT: Any reason we are not being consistent and using drm_err / drm_debug (same below)? either way, ensuring we get PCI
device id info in the dmesg output we are good.

> +
> +		if (gsc_ext_om_alloc(gsc, intf, def->lmem_size)) {
> +			dev_err(&pdev->dev, "setting up gsc extended operational memory failed\n");
> +			kfree(adev);
> +			goto fail;
> +		}
> +
> +		adev->ext_op_mem.start = i915_gem_object_get_dma_address(intf->gem_obj, 0);
> +		adev->ext_op_mem.end = adev->ext_op_mem.start + def->lmem_size;
> +	}
> +


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