[Intel-gfx] [PATCH i-g-t] i915/gem_exec_balancer: fix parallel_ordering with no-reloc

[Nirmoy Das]

Make sure to allocate ahnd so that spinner starts with no-reloc
execbuf otherwise this will fail on platforms with relocation disabled.

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6117
Signed-off-by: Nirmoy Das <nirmoy.das at intel.com>
---
 tests/i915/gem_exec_balancer.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/tests/i915/gem_exec_balancer.c b/tests/i915/gem_exec_balancer.c
index 186975c46..636c96f9e 100644
--- a/tests/i915/gem_exec_balancer.c
+++ b/tests/i915/gem_exec_balancer.c
@@ -3108,6 +3108,7 @@ static void parallel_ordering(int i915, unsigned int flags)
 		unsigned int count;
 		int i = 0, fence = 0;
 		uint32_t batch[16];
+		uint64_t ahnd;
 		struct drm_i915_gem_execbuffer2 execbuf;
 		struct drm_i915_gem_exec_object2 obj[32];
 		igt_spin_t *spin;
@@ -3162,7 +3163,9 @@ static void parallel_ordering(int i915, unsigned int flags)
 
 		/* Block parallel submission */
 		spin_ctx = ctx_create_engines(i915, siblings, count);
+		ahnd = get_simple_ahnd(i915, spin_ctx->id);
 		spin = __igt_spin_new(i915,
+				      .ahnd = ahnd,
 				      .ctx = spin_ctx,
 				      .engine = 0,
 				      .flags = IGT_SPIN_FENCE_OUT |
-- 
2.35.1