[Intel-gfx] Small bar recovery vs compressed content on DG2

Thomas Hellström thomas.hellstrom at linux.intel.com
Wed Mar 16 07:25:16 UTC 2022


Hi!

Do we somehow need to clarify in the headers the semantics for this?

 From my understanding when discussing the CCS migration series with 
Ram, the kernel will never do any resolving (compressing / 
decompressing) migrations or evictions which basically implies the 
following:

*) Compressed data must have LMEM only placement, otherwise the GPU 
would read garbage if accessing from SMEM.
*) Compressed data can't be assumed to be mappable by the CPU, because 
in order to ensure that on small BAR, the placement needs to be LMEM+SMEM.
*) Neither can compressed data be part of a CAPTURE buffer, because that 
requires the data to be CPU-mappable.

Are we (and user-mode drivers) OK with these restrictions, or do we need 
to rethink?

Thanks,

Thomas




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