[Intel-gfx] Small bar recovery vs compressed content on DG2

[Joonas Lahtinen]

Quoting Thomas Hellström (2022-03-16 09:25:16)
> Hi!
> 
> Do we somehow need to clarify in the headers the semantics for this?
> 
>  From my understanding when discussing the CCS migration series with 
> Ram, the kernel will never do any resolving (compressing / 
> decompressing) migrations or evictions which basically implies the 
> following:
> 
> *) Compressed data must have LMEM only placement, otherwise the GPU 
> would read garbage if accessing from SMEM.

This has always been the case, so it should be documented in the uAPI
headers and kerneldocs.

> *) Compressed data can't be assumed to be mappable by the CPU, because 
> in order to ensure that on small BAR, the placement needs to be LMEM+SMEM.

Not strictly true, as we could always migrate to the mappable region in
the CPU fault handler. Will need the same set of tricks as with limited
mappable GGTT in past.

> *) Neither can compressed data be part of a CAPTURE buffer, because that 
> requires the data to be CPU-mappable.

Especially this will be too big of a limitation which we can't really afford
when it comes to debugging.

Regards, Joonas

> Are we (and user-mode drivers) OK with these restrictions, or do we need 
> to rethink?
> 
> Thanks,
> 
> Thomas
> 
>