[Intel-gfx] [PATCH 6/8] drm/i915/debugfs: Add perf_limit_reasons in debugfs

[Vivi, Rodrigo]

On Fri, 2022-09-09 at 08:38 -0700, Dixit, Ashutosh wrote:
On Fri, 09 Sep 2022 03:13:05 -0700, Rodrigo Vivi wrote:

On Wed, Sep 07, 2022 at 10:22:49PM -0700, Ashutosh Dixit wrote:
From: Tilak Tangudu <tilak.tangudu at intel.com<mailto:tilak.tangudu at intel.com>>
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 24009786f88b..9492f8f43b25 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1802,6 +1802,7 @@
 #define   POWER_LIMIT_4_MASK           REG_BIT(8)
 #define   POWER_LIMIT_1_MASK           REG_BIT(10)
 #define   POWER_LIMIT_2_MASK           REG_BIT(11)
+#define   GT0_PERF_LIMIT_REASONS_LOG_MASK REG_GENMASK(31, 16)


I'm kind of confused here because I saw the other bits in the patch 5.

Sorry Rodrigo, patch 5 is a bug-fix patch which should probably be merged
to -fixes independent of this series, I have posted it independently too:

https://patchwork.freedesktop.org/series/108277/

yeap, better to merge this one first.

I hope https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108277v2/shard-apl4/igt@i915_pm_rps@engine-order.html
is not related to this patch. should we trigger a retest?


I was debating including patch 5 as part of this series but then it was
touching the same code so I ended up including it. Sorry for the confusion.

no worries. it makes sense now.
Thanks for the patience


but, anyway, thanks for improving the commit msg.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com<mailto:rodrigo.vivi at intel.com>>

Thanks.
--
Ashutosh

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