[Intel-gfx] [PATCH v2 5/5] drm/i915/dg2: Drop Wa_16011777198

Matt Roper matthew.d.roper at intel.com
Wed Aug 16 21:44:21 UTC 2023


On Wed, Aug 16, 2023 at 02:42:07PM -0700, Matt Roper wrote:
> Wa_16011777198 only applies to pre-production steppings of DG2, which
> we're no longer supporting.  Remove the workaround and override_gucrc
> handling, which is no longer needed.  Since this was the final use of

Woops, forgot to actually commit some of the removals here; let me send
a v3 with this really removed...


Matt

> IS_DG2_GRAPHICS_STEP, that macro can also be removed now.
> 
> Cc: Ashutosh Dixit <ashutosh.dixit at intel.com>
> Cc: Vinay Belgaumkar <vinay.belgaumkar at intel.com>
> Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h        | 19 ---------------
>  drivers/gpu/drm/i915/i915_perf.c       | 32 --------------------------
>  drivers/gpu/drm/i915/i915_perf_types.h |  6 -----
>  3 files changed, 57 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7f8fa0eb9dc6..d4568e31b777 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -670,25 +670,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  	(IS_METEORLAKE(__i915) && \
>  	 IS_MEDIA_STEP(__i915, since, until))
>  
> -/*
> - * DG2 hardware steppings are a bit unusual.  The hardware design was forked to
> - * create three variants (G10, G11, and G12) which each have distinct
> - * workaround sets.  The G11 and G12 forks of the DG2 design reset the GT
> - * stepping back to "A0" for their first iterations, even though they're more
> - * similar to a G10 B0 stepping and G10 C0 stepping respectively in terms of
> - * functionality and workarounds.  However the display stepping does not reset
> - * in the same manner --- a specific stepping like "B0" has a consistent
> - * meaning regardless of whether it belongs to a G10, G11, or G12 DG2.
> - *
> - * TLDR:  All GT workarounds and stepping-specific logic must be applied in
> - * relation to a specific subplatform (G10/G11/G12), whereas display workarounds
> - * and stepping-specific logic will be applied with a general DG2-wide stepping
> - * number.
> - */
> -#define IS_DG2_GRAPHICS_STEP(__i915, variant, since, until) \
> -	(IS_SUBPLATFORM(__i915, INTEL_DG2, INTEL_SUBPLATFORM_##variant) && \
> -	 IS_GRAPHICS_STEP(__i915, since, until))
> -
>  #define IS_PVC_BD_STEP(__i915, since, until) \
>  	(IS_PONTEVECCHIO(__i915) && \
>  	 IS_BASEDIE_STEP(__i915, since, until))
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index 04bc1f4a1115..dfe7eff7d1a1 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -1675,13 +1675,6 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
>  
>  	free_oa_buffer(stream);
>  
> -	/*
> -	 * Wa_16011777198:dg2: Unset the override of GUCRC mode to enable rc6.
> -	 */
> -	if (stream->override_gucrc)
> -		drm_WARN_ON(&gt->i915->drm,
> -			    intel_guc_slpc_unset_gucrc_mode(&gt->uc.guc.slpc));
> -
>  	intel_uncore_forcewake_put(stream->uncore, FORCEWAKE_ALL);
>  	intel_engine_pm_put(stream->engine);
>  
> @@ -3272,7 +3265,6 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream,
>  	struct drm_i915_private *i915 = stream->perf->i915;
>  	struct i915_perf *perf = stream->perf;
>  	struct i915_perf_group *g;
> -	struct intel_gt *gt;
>  	int ret;
>  
>  	if (!props->engine) {
> @@ -3280,7 +3272,6 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream,
>  			"OA engine not specified\n");
>  		return -EINVAL;
>  	}
> -	gt = props->engine->gt;
>  	g = props->engine->oa_group;
>  
>  	/*
> @@ -3381,25 +3372,6 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream,
>  	intel_engine_pm_get(stream->engine);
>  	intel_uncore_forcewake_get(stream->uncore, FORCEWAKE_ALL);
>  
> -	/*
> -	 * Wa_16011777198:dg2: GuC resets render as part of the Wa. This causes
> -	 * OA to lose the configuration state. Prevent this by overriding GUCRC
> -	 * mode.
> -	 */
> -	if (intel_uc_uses_guc_rc(&gt->uc) &&
> -	    (IS_DG2_GRAPHICS_STEP(gt->i915, G10, STEP_A0, STEP_C0) ||
> -	     IS_DG2_GRAPHICS_STEP(gt->i915, G11, STEP_A0, STEP_B0))) {
> -		ret = intel_guc_slpc_override_gucrc_mode(&gt->uc.guc.slpc,
> -							 SLPC_GUCRC_MODE_GUCRC_NO_RC6);
> -		if (ret) {
> -			drm_dbg(&stream->perf->i915->drm,
> -				"Unable to override gucrc mode\n");
> -			goto err_gucrc;
> -		}
> -
> -		stream->override_gucrc = true;
> -	}
> -
>  	ret = alloc_oa_buffer(stream);
>  	if (ret)
>  		goto err_oa_buf_alloc;
> @@ -3436,10 +3408,6 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream,
>  	free_oa_buffer(stream);
>  
>  err_oa_buf_alloc:
> -	if (stream->override_gucrc)
> -		intel_guc_slpc_unset_gucrc_mode(&gt->uc.guc.slpc);
> -
> -err_gucrc:
>  	intel_uncore_forcewake_put(stream->uncore, FORCEWAKE_ALL);
>  	intel_engine_pm_put(stream->engine);
>  
> diff --git a/drivers/gpu/drm/i915/i915_perf_types.h b/drivers/gpu/drm/i915/i915_perf_types.h
> index fe3a5dae8c22..13b1ae9b96c7 100644
> --- a/drivers/gpu/drm/i915/i915_perf_types.h
> +++ b/drivers/gpu/drm/i915/i915_perf_types.h
> @@ -338,12 +338,6 @@ struct i915_perf_stream {
>  	 * buffer should be checked for available data.
>  	 */
>  	u64 poll_oa_period;
> -
> -	/**
> -	 * @override_gucrc: GuC RC has been overridden for the perf stream,
> -	 * and we need to restore the default configuration on release.
> -	 */
> -	bool override_gucrc;
>  };
>  
>  /**
> -- 
> 2.41.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation


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