[Intel-gfx] [PATCH 2/2] drm/i915: rename I915_PMU_MAX_GTS to I915_PMU_MAX_GT

[Matt Roper]

On Fri, Jun 02, 2023 at 04:17:54PM -0700, Matt Atwood wrote:
> _GTS as an abbreviation here leads to some confusion, match other
> definitions and drop the s.
> 
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Cc: Ashutosh Dixit <ashutosh.dixit at linux.intel.com>
> Cc: Andi Shyti <andy.shyti at linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>
> 

You generally don't want/need a blank line here, but we can fix that
while applying.

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> Signed-off-by: Matt Atwood <matthew.s.atwood at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_pmu.c | 2 +-
>  drivers/gpu/drm/i915/i915_pmu.h | 8 ++++----
>  2 files changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
> index f96fe92dca4e..d35973b41186 100644
> --- a/drivers/gpu/drm/i915/i915_pmu.c
> +++ b/drivers/gpu/drm/i915/i915_pmu.c
> @@ -132,7 +132,7 @@ static u32 frequency_enabled_mask(void)
>  	unsigned int i;
>  	u32 mask = 0;
>  
> -	for (i = 0; i < I915_PMU_MAX_GTS; i++)
> +	for (i = 0; i < I915_PMU_MAX_GT; i++)
>  		mask |= config_mask(__I915_PMU_ACTUAL_FREQUENCY(i)) |
>  			config_mask(__I915_PMU_REQUESTED_FREQUENCY(i));
>  
> diff --git a/drivers/gpu/drm/i915/i915_pmu.h b/drivers/gpu/drm/i915/i915_pmu.h
> index d20592e7db99..41af038c3738 100644
> --- a/drivers/gpu/drm/i915/i915_pmu.h
> +++ b/drivers/gpu/drm/i915/i915_pmu.h
> @@ -38,7 +38,7 @@ enum {
>  	__I915_NUM_PMU_SAMPLERS
>  };
>  
> -#define I915_PMU_MAX_GTS 2
> +#define I915_PMU_MAX_GT 2
>  
>  /*
>   * How many different events we track in the global PMU mask.
> @@ -47,7 +47,7 @@ enum {
>   */
>  #define I915_PMU_MASK_BITS \
>  	(I915_ENGINE_SAMPLE_COUNT + \
> -	 I915_PMU_MAX_GTS * __I915_PMU_TRACKED_EVENT_COUNT)
> +	 I915_PMU_MAX_GT * __I915_PMU_TRACKED_EVENT_COUNT)
>  
>  #define I915_ENGINE_SAMPLE_COUNT (I915_SAMPLE_SEMA + 1)
>  
> @@ -127,11 +127,11 @@ struct i915_pmu {
>  	 * Only global counters are held here, while the per-engine ones are in
>  	 * struct intel_engine_cs.
>  	 */
> -	struct i915_pmu_sample sample[I915_PMU_MAX_GTS][__I915_NUM_PMU_SAMPLERS];
> +	struct i915_pmu_sample sample[I915_PMU_MAX_GT][__I915_NUM_PMU_SAMPLERS];
>  	/**
>  	 * @sleep_last: Last time GT parked for RC6 estimation.
>  	 */
> -	ktime_t sleep_last[I915_PMU_MAX_GTS];
> +	ktime_t sleep_last[I915_PMU_MAX_GT];
>  	/**
>  	 * @irq_count: Number of interrupts
>  	 *
> -- 
> 2.40.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation