[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tc: Align the ADLP TypeC sequences with bspec
Patchwork
patchwork at emeril.freedesktop.org
Thu Mar 23 16:20:06 UTC 2023
== Series Details ==
Series: drm/i915/tc: Align the ADLP TypeC sequences with bspec
URL : https://patchwork.freedesktop.org/series/115556/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12905 -> Patchwork_115556v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/index.html
Participating hosts (37 -> 36)
------------------------------
Missing (1): fi-snb-2520m
Known issues
------------
Here are the changes found in Patchwork_115556v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt at i915_selftest@live at gt_heartbeat:
- fi-apl-guc: [PASS][1] -> [DMESG-FAIL][2] ([i915#5334])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
* igt at i915_selftest@live at requests:
- bat-rpls-1: [PASS][3] -> [ABORT][4] ([i915#7911])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/bat-rpls-1/igt@i915_selftest@live@requests.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/bat-rpls-1/igt@i915_selftest@live@requests.html
#### Possible fixes ####
* igt at kms_pipe_crc_basic@nonblocking-crc-frame-sequence at pipe-d-dp-1:
- bat-dg2-8: [FAIL][5] -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1.html
#### Warnings ####
* igt at i915_selftest@live at slpc:
- bat-rpls-2: [DMESG-FAIL][7] ([i915#6997] / [i915#7913]) -> [DMESG-FAIL][8] ([i915#6367] / [i915#7913] / [i915#7996])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12905/bat-rpls-2/igt@i915_selftest@live@slpc.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/bat-rpls-2/igt@i915_selftest@live@slpc.html
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
[i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#7996]: https://gitlab.freedesktop.org/drm/intel/issues/7996
Build changes
-------------
* Linux: CI_DRM_12905 -> Patchwork_115556v1
CI-20190529: 20190529
CI_DRM_12905: 3a266f994a6b752953eb974ab7bf1dc382a2d1b8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7211: c0cc1de7b2f4041ca68960362aa55f881d416bac @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_115556v1: 3a266f994a6b752953eb974ab7bf1dc382a2d1b8 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
eacb3f20579c drm/i915: Remove the encoder update_prepare()/complete() hooks
c8a755423ba4 drm/i915: Remove TC PHY disconnect workaround
8953b94f744d drm/i915: Disable DPLLs before disconnecting the TC PHY
a31485fd5235 drm/i915: Move shared DPLL disabling into CRTC disable hook
a6f821a3e5c2 drm/i915/adlp/tc: Align the connect/disconnect PHY sequence with bspec
fc9377aaa0ab drm/i915/tc: Don't connect the PHY in intel_tc_port_connected()
ef101363e765 drm/i915/tc: Get power ref for reading the HPD live status register
ba700337d218 drm/i915/adlp/tc: Use the DE HPD ISR register for hotplug detection
c2e2b015e2e4 drm/i915/tc: Add TC PHY hook to init the PHY
782e1f88fc75 drm/i915/tc: Add asserts in TC PHY hooks that the required power is on
07a6ccb9873c drm/i915/tc: Add TC PHY hook to get the TC-cold blocking power domain
2093be8d1e71 drm/i915/tc: Drop tc_cold_block()/unblock()'s power domain parameter
7d333d02799d drm/i915/tc: Remove redundant wakeref=0 check from unblock_tc_cold()
20215aab0c94 drm/i915/tc: Block/unblock TC-cold in the PHY connect/disconnect hooks
c52180943cea drm/i915/tc: Check TC mode instead of the VBT legacy flag
902536fbcc24 drm/i915/tc: Fix up the legacy VBT flag only in disconnected mode
e92c6edf73a2 drm/i915/tc: Add TC PHY hooks to connect/disconnect the PHY
90848d33f675 drm/i915/tc: Factor out tc_phy_verify_legacy_or_dp_alt_mode()
fd64967db134 drm/i915/tc: Add generic TC PHY connect/disconnect handlers
caf5d74cefb4 drm/i915/tc: Add TC PHY hook to read out the PHY HW state
07b2f0b9762c drm/i915/tc: Add TC PHY hooks to get the PHY ready/owned state
3ad47bfe8a83 drm/i915/tc: Add TC PHY hook to get the PHY HPD live status
0114b48c0cc1 drm/i915/tc: Move the intel_tc_port struct declaration to intel_tc.c
25f5ce3954fb drm/i915/tc: Check for TC PHY explicitly in intel_tc_port_fia_max_lane_count()
4b423900f9e6 drm/i915/tc: Move TC port fields to a new intel_tc_port struct
89eccb3efa96 drm/i915/tc: Use the tc_phy prefix for all TC PHY functions
790a351f1457 drm/i915/tc: Rename tc_phy_status_complete() to tc_phy_is_ready()
773eeb4fba3e drm/i915/tc: Use the adlp prefix for ADLP TC PHY functions
35d186692393 drm/i915/tc: Group the TC PHY setup/query functions per platform
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115556v1/index.html
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