[Intel-gfx] [PATCH] drm/i915/mcr: Hold GT forcewake during steering operations

[Nirmoy Das]

On 10/19/2023 6:39 PM, Matt Roper wrote:
> The steering control and semaphore registers are inside an "always on"
> power domain with respect to RC6.  However there are some issues if
> higher-level platform sleep states are entering/exiting at the same time
> these registers are accessed.  Grabbing GT forcewake and holding it over
> the entire lock/steer/unlock cycle ensures that those sleep states have
> been fully exited before we access these registers.
>
> This is expected to become a formally documented/numbered workaround
> soon.
>
> Note that this patch alone isn't expected to have an immediately
> noticeable impact on MCR (mis)behavior; an upcoming pcode firmware
> update will also be necessary to provide the other half of this
> workaround.
>
> Fixes: 4186e2185b4f ("drm/i915/gt: Add dedicated MCR lock")
> Cc: Radhakrishna Sripada <radhakrishna.sripada at intel.com>
> Cc: Jonathan Cavitt <jonathan.cavitt at intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das at intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_gt_mcr.c | 17 +++++++++++++++++
>   1 file changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c
> index 326c2ed1d99b..83bb0575b426 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c
> @@ -371,6 +371,21 @@ void intel_gt_mcr_lock(struct intel_gt *gt, unsigned long *flags)
>   
>   	lockdep_assert_not_held(&gt->uncore->lock);
>   
> +	/*
> +	 * The steering control and semaphore registers are inside an
> +	 * "always on" power domain with respect to RC6.  However there are
> +	 * some issues if higher-level platform sleep states are
> +	 * entering/exiting at the same time these registers are accessed.
> +	 * Grabbing GT forcewake and holding it over the entire
> +	 * lock/steer/unlock cycle ensures that those sleep states have been
> +	 * fully exited before we access these registers.  This
> +	 * wakeref will be released in the unlock routine.
> +	 *
> +	 * This is expected to become a formally documented/numbered workaround
> +	 * soon.
> +	 */
> +	intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_GT);
> +
>   	/*
>   	 * Starting with MTL, we need to coordinate not only with other
>   	 * driver threads, but also with hardware/firmware agents.  A dedicated
> @@ -417,6 +432,8 @@ void intel_gt_mcr_unlock(struct intel_gt *gt, unsigned long flags)
>   
>   	if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70))
>   		intel_uncore_write_fw(gt->uncore, MTL_STEER_SEMAPHORE, 0x1);
> +
> +	intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_GT);
>   }
>   
>   /**