[Intel-gfx] [PATCH v5 3/3] drm/i915/lrc: User PXP contexts requires runalone bit in lrc

[Balasubrawmanian, Vivaik]

On 9/14/2023 3:51 PM, Balasubrawmanian, Vivaik wrote:
> On 9/9/2023 3:38 PM, Alan Previn wrote:
>> On Meteorlake onwards, HW specs require that all user contexts that
>> run on render or compute engines and require PXP must enforce
>> run-alone bit in lrc. Add this enforcement for protected contexts.
>>
>> Signed-off-by: Alan Previn <alan.previn.teres.alexis at intel.com>
>> ---
>>   drivers/gpu/drm/i915/gt/intel_lrc.c | 23 +++++++++++++++++++++++
>>   1 file changed, 23 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c 
>> b/drivers/gpu/drm/i915/gt/intel_lrc.c
>> index 967fe4d77a87..3df32177e49e 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
>> @@ -845,6 +845,27 @@ lrc_setup_indirect_ctx(u32 *regs,
>>           lrc_ring_indirect_offset_default(engine) << 6;
>>   }
>>   +static bool ctx_needs_runalone(const struct intel_context *ce)
>> +{
>> +    struct i915_gem_context *gem_ctx;
>> +    bool ctx_is_protected = false;
>> +
>> +    /*
>> +     * On MTL and newer platforms, protected contexts require setting
>> +     * the LRC run-alone bit or else the encryption will not happen.
>> +     */
>> +    if (GRAPHICS_VER_FULL(ce->engine->i915) >= IP_VER(12, 70) &&
>> +        (ce->engine->class == COMPUTE_CLASS || ce->engine->class == 
>> RENDER_CLASS)) {
>> +        rcu_read_lock();
>> +        gem_ctx = rcu_dereference(ce->gem_context);
>> +        if (gem_ctx)
>> +            ctx_is_protected = gem_ctx->uses_protected_content;
>> +        rcu_read_unlock();
>> +    }
>> +
>> +    return ctx_is_protected;
>> +}
>> +
>>   static void init_common_regs(u32 * const regs,
>>                    const struct intel_context *ce,
>>                    const struct intel_engine_cs *engine,
>> @@ -860,6 +881,8 @@ static void init_common_regs(u32 * const regs,
>>       if (GRAPHICS_VER(engine->i915) < 11)
>>           ctl |= _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT |
>>                          CTX_CTRL_RS_CTX_ENABLE);
>> +    if (ctx_needs_runalone(ce))
>> +        ctl |= _MASKED_BIT_ENABLE(BIT(7));
>>       regs[CTX_CONTEXT_CONTROL] = ctl;
>>         regs[CTX_TIMESTAMP] = ce->stats.runtime.last;
>
> Can we please get the bit defined in intel_engine_regs.h with a define 
> instead of a number identification?
>
> Review completed conditional to the above fix.
>
> Reviewed-by: Balasubrawmanian, Vivaik 
> <vivaik.balasubrawmanian at intel.com> 
> <mailto:vivaik.balasubrawmanian at intel.com>
>