[Intel-gfx] [PATCH v5 3/3] drm/i915/lrc: User PXP contexts requires runalone bit in lrc

[Teres Alexis, Alan Previn]

On Sat, 2023-09-09 at 15:38 -0700, Teres Alexis, Alan Previn wrote:
> On Meteorlake onwards, HW specs require that all user contexts that
> run on render or compute engines and require PXP must enforce
> run-alone bit in lrc. Add this enforcement for protected contexts.
alan:snip
> 
> Signed-off-by: Alan Previn <alan.previn.teres.alexis at intel.com>
> @@ -860,6 +881,8 @@ static void init_common_regs(u32 * const regs,
>  	if (GRAPHICS_VER(engine->i915) < 11)
>  		ctl |= _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT |
>  					   CTX_CTRL_RS_CTX_ENABLE);
> +	if (ctx_needs_runalone(ce))
> +		ctl |= _MASKED_BIT_ENABLE(BIT(7));
>  	regs[CTX_CONTEXT_CONTROL] = ctl;
>  
>  	regs[CTX_TIMESTAMP] = ce->stats.runtime.last;
alan: to align intel-gfx ml, Vivaik reviewed this on dri-devel at https://lists.freedesktop.org/archives/dri-devel/2023-September/422875.html - snippet:
thus, will rerev this (with the others fixes in this series).

>> Can we please get the bit defined in intel_engine_regs.h with a define 
>> instead of a number identification?
>> 
>> Review completed conditional to the above fix.
>> 
>> Reviewed-by: Balasubrawmanian, Vivaik 
>> <vivaik.balasubrawmanian at intel.com> 
>> <mailto:vivaik.balasubrawmanian at intel.com>