[PATCH 10/14] drm/i915/dsb: Introduce intel_dsb_chain()

Manna, Animesh animesh.manna at intel.com
Wed Aug 21 15:05:05 UTC 2024



> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Sent: Wednesday, July 3, 2024 5:50 PM
> To: Manna, Animesh <animesh.manna at intel.com>
> Cc: intel-gfx at lists.freedesktop.org
> Subject: Re: [PATCH 10/14] drm/i915/dsb: Introduce intel_dsb_chain()
> 
> On Wed, Jul 03, 2024 at 12:10:38PM +0000, Manna, Animesh wrote:
> >
> >
> > > -----Original Message-----
> > > From: Intel-gfx <intel-gfx-bounces at lists.freedesktop.org> On Behalf
> > > Of Ville Syrjala
> > > Sent: Tuesday, June 25, 2024 12:40 AM
> > > To: intel-gfx at lists.freedesktop.org
> > > Subject: [PATCH 10/14] drm/i915/dsb: Introduce intel_dsb_chain()
> > >
> > > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > >
> > > In order to handle the DEwake tricks without involving the CPU we
> > > need a mechanism by which one DSB can start another one. Add a basic
> > > function to do so. We'll extend it later with additional code to actually
> deal with DEwake.
> >
> > Is chained DSB concept restricting to only 2 DSB instance or can be
> extended to available/max DSB instances?
> >
> > Are we exposing full chain of DSB to user or can be restrict to primary DSB
> which will control other instances?
> 
> You can start any DSB from any other DSB.
> 
> > >
> > > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_dsb.c | 42
> > > ++++++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dsb.h |
> > > 3 ++
> > >  2 files changed, 45 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
> > > b/drivers/gpu/drm/i915/display/intel_dsb.c
> > > index 092cf082ac39..4c0519c41f16 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> > > @@ -502,6 +502,48 @@ static u32 dsb_error_int_en(struct
> > > intel_display
> > > *display)
> > >  	return errors;
> > >  }
> > >
> > > +static void _intel_dsb_chain(struct intel_atomic_state *state,
> > > +			     struct intel_dsb *dsb,
> > > +			     struct intel_dsb *chained_dsb,
> > > +			     u32 ctrl)
> >
> > I do not see any usage of ctrl variable in this patch, maybe good to add
> wherever will be using it.
> 
> It's in the next patch.

If we agree that intel_dsb_chain() will always work with DSB_WAIT_FOR_VBLANK, this ctrl variable will not be needed.

Regards,
Animesh

> 
> >
> > Regards,
> > Animesh
> > > +{
> > > +	struct intel_display *display = to_intel_display(state->base.dev);
> > > +	struct intel_crtc *crtc = dsb->crtc;
> > > +	enum pipe pipe = crtc->pipe;
> > > +	u32 tail;
> > > +
> > > +	if (drm_WARN_ON(display->drm, dsb->id == chained_dsb->id))
> > > +		return;
> > > +
> > > +	tail = chained_dsb->free_pos * 4;
> > > +	if (drm_WARN_ON(display->drm, !IS_ALIGNED(tail,
> > > CACHELINE_BYTES)))
> > > +		return;
> > > +
> > > +	intel_dsb_reg_write(dsb, DSB_CTRL(pipe, chained_dsb->id),
> > > +			    ctrl | DSB_ENABLE);
> > > +
> > > +	intel_dsb_reg_write(dsb, DSB_CHICKEN(pipe, chained_dsb->id),
> > > +			    dsb_chicken(state, crtc));
> > > +
> > > +	intel_dsb_reg_write(dsb, DSB_INTERRUPT(pipe, chained_dsb->id),
> > > +			    dsb_error_int_status(display) |
> > > DSB_PROG_INT_STATUS |
> > > +			    dsb_error_int_en(display));
> > > +
> > > +	intel_dsb_reg_write(dsb, DSB_HEAD(pipe, chained_dsb->id),
> > > +			    intel_dsb_buffer_ggtt_offset(&chained_dsb-
> > > >dsb_buf));
> > > +
> > > +	intel_dsb_reg_write(dsb, DSB_TAIL(pipe, chained_dsb->id),
> > > +			    intel_dsb_buffer_ggtt_offset(&chained_dsb-
> > > >dsb_buf) + tail); }
> > > +
> > > +void intel_dsb_chain(struct intel_atomic_state *state,
> > > +		     struct intel_dsb *dsb,
> > > +		     struct intel_dsb *chained_dsb) {
> > > +	_intel_dsb_chain(state, dsb, chained_dsb,
> > > +			 0);
> > > +}
> > > +
> > >  static void _intel_dsb_commit(struct intel_dsb *dsb, u32 ctrl,
> > >  			      int hw_dewake_scanline)
> > >  {
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dsb.h
> > > b/drivers/gpu/drm/i915/display/intel_dsb.h
> > > index d0737cefb393..e59fd7da0fc0 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dsb.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_dsb.h
> > > @@ -45,6 +45,9 @@ void intel_dsb_wait_scanline_in(struct
> > > intel_atomic_state *state,  void intel_dsb_wait_scanline_out(struct
> > > intel_atomic_state *state,
> > >  				 struct intel_dsb *dsb,
> > >  				 int lower, int upper);
> > > +void intel_dsb_chain(struct intel_atomic_state *state,
> > > +		     struct intel_dsb *dsb,
> > > +		     struct intel_dsb *chained_dsb);
> > >
> > >  void intel_dsb_commit(struct intel_dsb *dsb,
> > >  		      bool wait_for_vblank);
> > > --
> > > 2.44.2
> >
> 
> --
> Ville Syrjälä
> Intel


More information about the Intel-gfx mailing list