[PATCH 4/5] drm/i915/vbt: define a few more DSI dphy config bits
Jani Nikula
jani.nikula at intel.com
Thu Dec 5 14:45:38 UTC 2024
We're missing Blanking Packets During BLLP and LP Clock During LPM. Add
them.
Signed-off-by: Jani Nikula <jani.nikula at intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h
index f9841f0498c6..a8ef7f9a5503 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -157,7 +157,9 @@ struct mipi_config {
u16 dphy_param_valid:1;
u16 eot_pkt_disabled:1;
u16 enable_clk_stop:1;
- u16 rsvd7:13;
+ u16 blanking_packets_during_bllp:1; /* 219+ */
+ u16 lp_clock_during_lpm:1; /* 219+ */
+ u16 rsvd7:11;
u32 hs_tx_timeout;
u32 lp_rx_timeout;
--
2.39.5
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