[PATCH 11/14] drm/i915/dp_mst: Refactor pipe_bpp limits with dsc for mst
Nautiyal, Ankit K
ankit.k.nautiyal at intel.com
Fri Dec 13 12:32:09 UTC 2024
On 12/13/2024 3:07 PM, Jani Nikula wrote:
> On Wed, 04 Dec 2024, Ankit Nautiyal <ankit.k.nautiyal at intel.com> wrote:
>> Similar to DP, set the dsc limits->pipe.max/min_bpp early for MST too.
>> Use the limits while computing the compressed bpp.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
>> Reviewed-by: Suraj Kandpal <suraj.kandpal at intel.com>
> I think we should take this one step further with [1], basically
> eradicating mst_stream_compute_config_limits(). Indeed, I'd like to get
> that merged first.
Makes sense, will wait for the above to get merged.
Thanks & Regards,
Ankit
>
> BR,
> Jani.
>
>
>
> [1] https://lore.kernel.org/r/20241211144310.701895-1-jani.nikula@intel.com
>
>
>
>> ---
>> drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
>> drivers/gpu/drm/i915/display/intel_dp.h | 3 +++
>> drivers/gpu/drm/i915/display/intel_dp_mst.c | 11 +++++------
>> 3 files changed, 9 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index fe0957e028bc..c5740b8d2315 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -2504,7 +2504,7 @@ intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp,
>> return true;
>> }
>>
>> -static void
>> +void
>> intel_dp_dsc_compute_pipe_bpp_limits(struct intel_dp *intel_dp,
>> struct link_config_limits *limits)
>> {
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
>> index 4895b52d41e8..45b37d322565 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.h
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
>> @@ -200,6 +200,9 @@ intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp,
>> const struct intel_crtc_state *crtc_state,
>> bool dsc,
>> struct link_config_limits *limits);
>> +void
>> +intel_dp_dsc_compute_pipe_bpp_limits(struct intel_dp *intel_dp,
>> + struct link_config_limits *limits);
>>
>> void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct intel_connector *connector);
>> bool intel_dp_has_gamut_metadata_dip(struct intel_encoder *encoder);
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
>> index 795594191717..667006918bfd 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
>> @@ -365,14 +365,10 @@ static int mst_stream_dsc_compute_link_config(struct intel_dp *intel_dp,
>> int i, num_bpc;
>> u8 dsc_bpc[3] = {};
>> int min_bpp, max_bpp, sink_min_bpp, sink_max_bpp;
>> - int dsc_max_bpc, dsc_min_bpc;
>> int min_compressed_bpp, max_compressed_bpp;
>>
>> - dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(display);
>> - dsc_min_bpc = intel_dp_dsc_min_src_input_bpc();
>> -
>> - max_bpp = min(dsc_max_bpc * 3, limits->pipe.max_bpp);
>> - min_bpp = max(dsc_min_bpc * 3, limits->pipe.min_bpp);
>> + max_bpp = limits->pipe.max_bpp;
>> + min_bpp = limits->pipe.min_bpp;
>>
>> num_bpc = drm_dp_dsc_sink_supported_input_bpcs(connector->dp.dsc_dpcd,
>> dsc_bpc);
>> @@ -574,6 +570,9 @@ mst_stream_compute_config_limits(struct intel_dp *intel_dp,
>>
>> intel_dp_test_compute_config(intel_dp, crtc_state, limits);
>>
>> + if (dsc)
>> + intel_dp_dsc_compute_pipe_bpp_limits(intel_dp, limits);
>> +
>> if (!intel_dp_compute_config_link_bpp_limits(intel_dp,
>> crtc_state,
>> dsc,
More information about the Intel-gfx
mailing list