[PATCH] drm/i915/display: program DBUF_CTL tracker state service to 0x8
Ravi Kumar Vodapalli
ravi.kumar.vodapalli at intel.com
Mon Dec 16 12:45:07 UTC 2024
Program Tracker state service(DBUF_CTL Register) for TGLLP, SVL,
RYF, DG1, ACM, ACMPLUS, RKLC, RKLGM, ADLS platforms to 0x8 which
is not the default value.
Bspec: 49213
Signed-off-by: Ravi Kumar Vodapalli <ravi.kumar.vodapalli at intel.com>
---
drivers/gpu/drm/i915/display/intel_display_power.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 34465d56def0..d9ba48b68979 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1126,7 +1126,9 @@ static void gen12_dbuf_slices_config(struct intel_display *display)
{
enum dbuf_slice slice;
- if (display->platform.alderlake_p)
+ if (display->platform.alderlake_p || display->platform.dg2 ||
+ display->platform.alderlake_p_raptorlake_p ||
+ DISPLAY_VER(display) >= 14)
return;
for_each_dbuf_slice(display, slice)
--
2.25.1
More information about the Intel-gfx
mailing list