[PATCH] drm/i915/display: Don't update DBUF_TRACKER_STATE_SERVICE

[Cavitt, Jonathan]

-----Original Message-----
From: Intel-gfx <intel-gfx-bounces at lists.freedesktop.org> On Behalf Of Ravi Kumar Vodapalli
Sent: Friday, December 20, 2024 11:57 AM
To: intel-gfx at lists.freedesktop.org
Cc: Vivekanandan, Balasubramani <balasubramani.vivekanandan at intel.com>; Roper, Matthew D <matthew.d.roper at intel.com>; De Marchi, Lucas <lucas.demarchi at intel.com>; Sousa, Gustavo <gustavo.sousa at intel.com>; Taylor, Clinton A <clinton.a.taylor at intel.com>; Atwood, Matthew S <matthew.s.atwood at intel.com>; Bhadane, Dnyaneshwar <dnyaneshwar.bhadane at intel.com>; Kalvala, Haridhar <haridhar.kalvala at intel.com>; Chauhan, Shekhar <shekhar.chauhan at intel.com>
Subject: [PATCH] drm/i915/display: Don't update DBUF_TRACKER_STATE_SERVICE
> 
> While display initialization along with MBUS credits programming
> DBUF_CTL register is also programmed, as a part of it the
> DBUF_TRACKER_STATE_SERVICE is updated to 0x8 value when default
> value is other than 0x8 for platforms
> 1. display version 12
> 2. DG2.
> Other platforms unless stated should use their default value

Maybe:
"""
During display initialization, along with MBUS credits programming
the DBUF_CTL register is also programmed.  As a part of this process,
the DBUF_TRACKER_STATE_SERVICE value is updated to 0x8.  This is
a requirement for
1. platforms using display version 12, and
2. DG2.
Other platforms do not share this requirement and until otherwise
stated should use their default values.
"""
But the current commit message works, so I won't block on it.

Reviewed-by: Jonathan Cavitt <jonathan.cavitt at intel.com>

However, I think @Sousa, Gustavo might have some additional
notes, so wait a bit before having this pushed.

-Jonathan Cavitt

> 
> Bspec: 49213
> Signed-off-by: Ravi Kumar Vodapalli <ravi.kumar.vodapalli at intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_power.c | 5 +----
>  1 file changed, 1 insertion(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 34465d56def0..9c20459053fe 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -1126,9 +1126,6 @@ static void gen12_dbuf_slices_config(struct intel_display *display)
>  {
>  	enum dbuf_slice slice;
>  
> -	if (display->platform.alderlake_p)
> -		return;
> -
>  	for_each_dbuf_slice(display, slice)
>  		intel_de_rmw(display, DBUF_CTL_S(slice),
>  			     DBUF_TRACKER_STATE_SERVICE_MASK,
> @@ -1681,7 +1678,7 @@ static void icl_display_core_init(struct intel_display *display,
>  	/* 4. Enable CDCLK. */
>  	intel_cdclk_init_hw(display);
>  
> -	if (DISPLAY_VER(display) >= 12)
> +	if (DISPLAY_VER(display) == 12 || display->platform.dg2)
>  		gen12_dbuf_slices_config(display);
>  
>  	/* 5. Enable DBUF. */
> -- 
> 2.25.1
> 
>