[PATCH 08/12] drm/i915: Simplify vlv_wait_port_ready() arguments
Ville Syrjala
ville.syrjala at linux.intel.com
Thu Feb 13 15:02:16 UTC 2025
From: Ville Syrjälä <ville.syrjala at linux.intel.com>
Currently vlv_wait_port_ready() takes the display+dig_port,
but all it really needs is the encoder. The display can be
dug out from therein.
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
drivers/gpu/drm/i915/display/g4x_dp.c | 2 +-
drivers/gpu/drm/i915/display/g4x_hdmi.c | 6 ++----
drivers/gpu/drm/i915/display/intel_dpio_phy.c | 10 +++++-----
drivers/gpu/drm/i915/display/intel_dpio_phy.h | 6 ++----
4 files changed, 10 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index 0cb98cb043c6..372c3683c193 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -701,7 +701,7 @@ static void intel_enable_dp(struct intel_atomic_state *state,
if (display->platform.cherryview)
lane_mask = intel_dp_unused_lane_mask(pipe_config->lane_count);
- vlv_wait_port_ready(display, dp_to_dig_port(intel_dp), lane_mask);
+ vlv_wait_port_ready(encoder, lane_mask);
}
intel_dp_set_power(intel_dp, DP_SET_POWER_D0);
diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c
index 5c5eb3d621c8..d9d1304dcc36 100644
--- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
+++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
@@ -479,7 +479,6 @@ static void vlv_hdmi_pre_enable(struct intel_atomic_state *state,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
- struct intel_display *display = to_intel_display(encoder);
struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
vlv_phy_pre_encoder_enable(encoder, pipe_config);
@@ -495,7 +494,7 @@ static void vlv_hdmi_pre_enable(struct intel_atomic_state *state,
g4x_hdmi_enable_port(encoder, pipe_config);
- vlv_wait_port_ready(display, dig_port, 0x0);
+ vlv_wait_port_ready(encoder, 0x0);
}
static void vlv_hdmi_pre_pll_enable(struct intel_atomic_state *state,
@@ -556,7 +555,6 @@ static void chv_hdmi_pre_enable(struct intel_atomic_state *state,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
- struct intel_display *display = to_intel_display(encoder);
struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
chv_phy_pre_encoder_enable(encoder, pipe_config);
@@ -571,7 +569,7 @@ static void chv_hdmi_pre_enable(struct intel_atomic_state *state,
g4x_hdmi_enable_port(encoder, pipe_config);
- vlv_wait_port_ready(display, dig_port, 0x0);
+ vlv_wait_port_ready(encoder, 0x0);
/* Second common lane will stay alive on its own now */
chv_phy_release_cl2_override(encoder);
diff --git a/drivers/gpu/drm/i915/display/intel_dpio_phy.c b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
index 968b795206b3..429f89543789 100644
--- a/drivers/gpu/drm/i915/display/intel_dpio_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
@@ -1157,16 +1157,16 @@ void vlv_phy_reset_lanes(struct intel_encoder *encoder,
vlv_dpio_put(dev_priv);
}
-void vlv_wait_port_ready(struct intel_display *display,
- struct intel_digital_port *dig_port,
+void vlv_wait_port_ready(struct intel_encoder *encoder,
unsigned int expected_mask)
{
+ struct intel_display *display = to_intel_display(encoder);
u32 port_mask;
i915_reg_t dpll_reg;
- switch (dig_port->base.port) {
+ switch (encoder->port) {
default:
- MISSING_CASE(dig_port->base.port);
+ MISSING_CASE(encoder->port);
fallthrough;
case PORT_B:
port_mask = DPLL_PORTB_READY_MASK;
@@ -1186,7 +1186,7 @@ void vlv_wait_port_ready(struct intel_display *display,
if (intel_de_wait(display, dpll_reg, port_mask, expected_mask, 1000))
drm_WARN(display->drm, 1,
"timed out waiting for [ENCODER:%d:%s] port ready: got 0x%x, expected 0x%x\n",
- dig_port->base.base.base.id, dig_port->base.base.name,
+ encoder->base.base.id, encoder->base.name,
intel_de_read(display, dpll_reg) & port_mask,
expected_mask);
}
diff --git a/drivers/gpu/drm/i915/display/intel_dpio_phy.h b/drivers/gpu/drm/i915/display/intel_dpio_phy.h
index 15596407fe87..35baede3d6ad 100644
--- a/drivers/gpu/drm/i915/display/intel_dpio_phy.h
+++ b/drivers/gpu/drm/i915/display/intel_dpio_phy.h
@@ -72,8 +72,7 @@ void vlv_phy_pre_encoder_enable(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
void vlv_phy_reset_lanes(struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state);
-void vlv_wait_port_ready(struct intel_display *display,
- struct intel_digital_port *dig_port,
+void vlv_wait_port_ready(struct intel_encoder *encoder,
unsigned int expected_mask);
#else
static inline void bxt_port_to_phy_channel(struct intel_display *display, enum port port,
@@ -173,8 +172,7 @@ static inline void vlv_phy_reset_lanes(struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state)
{
}
-static inline void vlv_wait_port_ready(struct intel_display *display,
- struct intel_digital_port *dig_port,
+static inline void vlv_wait_port_ready(struct intel_encoder *encoder,
unsigned int expected_mask)
{
}
--
2.45.3
More information about the Intel-gfx
mailing list