[PATCH v3 8/8] drm/i915: fix typos in drm/i915 files

[Krzysztof Niemiec]

Hi Nitin,

...

> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 070ab6546987..686ed33c1a8b 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1146,7 +1146,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
>  	int ret;
>  
>  	/*
> -	 * In the proccess of replacing cache_level with pat_index a tricky
> +	 * In the process of replacing cache_level with pat_index a tricky
>  	 * dependency is created on the definition of the enum i915_cache_level.
>  	 * in case this enum is changed, PTE encode would be broken.

"in case" should be capitalized here.

>  	 * Add a WARNING here. And remove when we completely quit using this

...

> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index 2406cda75b7b..cea24ad657d7 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -570,7 +570,7 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
>  	tail = hw_tail;
>  
>  	/* Walk the stream backward until we find a report with report

Comment style can be fixed here...

> -	 * id and timestmap not at 0. Since the circular buffer pointers
> +	 * id and timestamp not at 0. Since the circular buffer pointers
>  	 * progress by increments of 64 bytes and that reports can be up
>  	 * to 256 bytes long, we can't tell whether a report has fully
>  	 * landed in memory before the report id and timestamp of the

...


> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 765e6c0528fb..902d7ad61021 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -84,7 +84,7 @@
>   * Try to name registers according to the specs. If the register name changes in
>   * the specs from platform to another, stick to the original name.
>   *
> - * Try to re-use existing register macro definitions. Only add new macros for
> + * Try to reuse existing register macro definitions. Only add new macros for
>   * new register offsets, or when the register contents have changed enough to
>   * warrant a full redefinition.
>   *
> @@ -492,7 +492,7 @@
>  #define MBUS_ABOX_BT_CREDIT_POOL1_MASK	(0x1F << 0)
>  #define MBUS_ABOX_BT_CREDIT_POOL1(x)	((x) << 0)
>  
> -/* Make render/texture TLB fetches lower priorty than associated data
> +/* Make render/texture TLB fetches lower priority than associated data

...and here.

>   *   fetches. This is not turned on by default
>   */
>  #define   MI_ARB_RENDER_TLB_LOW_PRIORITY	(1 << 15)

Thanks
Krzysztof