[PATCH v2 2/4] drm/i915/gvt: Select appropriate mmio list at initialization time

[Du, Changbin]

On Tue, Dec 05, 2017 at 11:55:31AM +0800, Zhenyu Wang wrote:
> On 2017.12.05 11:49:34 +0800, Du, Changbin wrote:
> > On Tue, Dec 05, 2017 at 11:46:22AM +0800, Zhenyu Wang wrote:
> >  >  static u32 gen9_render_mocs[I915_NUM_ENGINES][64];
> > > > @@ -282,21 +276,14 @@ static void switch_mmio_to_vgpu(struct intel_vgpu *vgpu, int ring_id)
> > > >  	u32 inhibit_mask =
> > > >  		_MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT);
> > > >  	i915_reg_t last_reg = _MMIO(0);
> > > > -	struct render_mmio *mmio;
> > > > +	struct engine_mmio *mmio;
> > > >  	u32 v;
> > > > -	int i, array_size;
> > > >  
> > > > -	if (IS_SKYLAKE(vgpu->gvt->dev_priv)
> > > > -		|| IS_KABYLAKE(vgpu->gvt->dev_priv)) {
> > > > -		mmio = gen9_render_mmio_list;
> > > > -		array_size = ARRAY_SIZE(gen9_render_mmio_list);
> > > > +	if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
> > > >  		load_mocs(vgpu, ring_id);
> > > > -	} else {
> > > > -		mmio = gen8_render_mmio_list;
> > > > -		array_size = ARRAY_SIZE(gen8_render_mmio_list);
> > > > -	}
> > > >  
> > > > -	for (i = 0; i < array_size; i++, mmio++) {
> > > > +	mmio = vgpu->gvt->engine_mmio_list;
> > > > +	while (i915_mmio_reg_offset((mmio++)->reg)) {
> > > >  		if (mmio->ring_id != ring_id)
> > > >  			continue;
> > > 
> > > Not safe to check end of the list and this will try to exceed the list?
> > > Seems wrong to me. Either use size of the list or mark array 0 end then
> > > check mmio pointer.
> > >
> > It will not exceed the list. The last mmio item is termination mark.
> >  
> 
> oh, wrong reading, was reading that's a comment line instead of real
> termination mark..better write explicitly as 0 item. thanks
>
zhenyu, the inside comment is to highlight the special purpose. Since default
value is 0, repeating that is a little werdy.

-- 
Thanks,
Changbin Du