December 2017 Archives by thread

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Starting: Fri Dec 1 03:26:10 UTC 2017
Ending: Sun Dec 31 15:12:58 UTC 2017
Messages: 287

[PATCH 0/2] drm/i915/gvt: fix media workload latency issue Zhenyu Wang
[PATCH 1/2] drm/i915/gvt: Don't mark vgpu context as inactive when preempted Zhenyu Wang
- [PATCH 2/2] drm/i915/gvt: set max priority for gvt context Zhenyu Wang
  - [PATCH 2/2] drm/i915/gvt: set max priority for gvt context Zhang, Xiong Y
    - [PATCH 2/2] drm/i915/gvt: set max priority for gvt context Zhenyu Wang
    - [PATCH] drm/i915/gvt: set max priority for gvt context Zhenyu Wang
[PATCH 0/3] Refine the mmio switch code changbin.du at intel.com
- [PATCH 1/3] drm/i915/gvt: Refine the ring mmio list definition changbin.du at intel.com
- [PATCH 2/3] drm/i915/gvt: Select appropriate mmio list at initialization time changbin.du at intel.com
- [PATCH 3/3] drm/i915/gvt: Rename file render.{c, h} to mmio_context.{c, h} changbin.du at intel.com
[PATCH] drm/i915/gvt: Fix out-of-bounds buffer write into opregion->signature[] Zhenyu Wang
[PATCH v2 0/4] Refine the mmio switch code changbin.du at intel.com
- [PATCH v2 2/4] drm/i915/gvt: Select appropriate mmio list at initialization time changbin.du at intel.com
  - [PATCH v2 2/4] drm/i915/gvt: Select appropriate mmio list at initialization time Zhenyu Wang
    - [PATCH v2 2/4] drm/i915/gvt: Select appropriate mmio list at initialization time Du, Changbin
    - [PATCH v2 2/4] drm/i915/gvt: Select appropriate mmio list at initialization time Zhenyu Wang
    - [PATCH v2 2/4] drm/i915/gvt: Select appropriate mmio list at initialization time Du, Changbin
- [PATCH v2 3/4] drm/i915/gvt: Remove MMIO barrier in MMIO switch changbin.du at intel.com
- [PATCH v2 4/4] drm/i915/gvt: Rename file render.{c, h} to mmio_context.{c, h} changbin.du at intel.com
  - [PATCH v2 4/4] drm/i915/gvt: Rename file render.{c, h} to mmio_context.{c, h} Zhenyu Wang
[PATCH v2 1/4] drm/i915/gvt: Refine the ring mmio list definition changbin.du at intel.com
[Intel-gfx] [PATCH] i915/gvt: make release_shadow_wa_ctx static. Joonas Lahtinen
- [Intel-gfx] [PATCH] i915/gvt: make release_shadow_wa_ctx static. Zhenyu Wang
[PATCH][next] drm/i915/gvt: Add missing breaks in switch statement Colin King
[PATCH][next] drm/i915/gvt: fix off-by-one comparison of ring_id Colin King
[GIT PULL] more gvt-next for 4.16 Zhenyu Wang
- [GIT PULL] more gvt-next for 4.16 Rodrigo Vivi
[PATCH] drm/i915/gvt: enabled pipe A as default for vgpu Xiaolin Zhang
- [PATCH] drm/i915/gvt: enabled pipe A as default for vgpu Zhenyu Wang
  - [PATCH] drm/i915/gvt: enabled pipe A as default for vgpu Zhang, Xiaolin
    - [PATCH] drm/i915/gvt: enabled pipe A as default for vgpu Zhenyu Wang
[PATCH] drm/i915: Disable display crc feature for vgpu Xiaolin Zhang
[gvt-linux:topic/gvt-xengt 5/31] include/xen/arm/interface.h:22:35: error: unknown type name '__guest_handle_ulong' kbuild test robot
- [gvt-linux:topic/gvt-xengt 5/31] include/xen/arm/interface.h:22:35: error: unknown type name '__guest_handle_ulong' Zhang, Pei
Fixes that failed to cleanly apply to v4.15-rc1 Joonas Lahtinen
- Fixes that failed to cleanly apply to v4.15-rc1 Zhenyu Wang
[PATCH 1/2] [security check]gvt/kvmgt: use break to get out of for loop Pei Zhang
[PATCH 2/2] [security check]gvt: refine function emulate_mmio_read Pei Zhang
[PATCH] [security check] xen: add definition of __guest_handle_ulong Pei Zhang
[PATCH] gvt/kvmgt: fill info for ROM/VGA region Pei Zhang
- [PATCH] gvt/kvmgt: fill info for ROM/VGA region Zhenyu Wang
- [PATCH] gvt/kvmgt: fill info for ROM/VGA region Zhang, Pei
gvt: refine function emulate_mmio_read/write Pei Zhang
- gvt: refine function emulate_mmio_read/write Zhenyu Wang
  - gvt: refine function emulate_mmio_read/write Zhang, Pei
[GIT PULL] gvt-fixes for 4.15-rc3 Zhenyu Wang
- [GIT PULL] gvt-fixes for 4.15-rc3 Joonas Lahtinen
- [Intel-gfx] [GIT PULL] gvt-fixes for 4.15-rc3 Daniel Vetter
[PATCH] ui: Add enabled field to egl_fb struct Tina Zhang
[PATCH v3 0/4] Refine the mmio switch code changbin.du at intel.com
- [PATCH v3 1/4] drm/i915/gvt: Refine the ring mmio list definition changbin.du at intel.com
- [PATCH v3 2/4] drm/i915/gvt: Select appropriate mmio list at initialization time changbin.du at intel.com
- [PATCH v3 3/4] drm/i915/gvt: Remove MMIO barrier in MMIO switch changbin.du at intel.com
- [PATCH v3 4/4] drm/i915/gvt: Rename file render.{c, h} to mmio_context.{c, h} changbin.du at intel.com
- [PATCH v3 0/4] Refine the mmio switch code Zhenyu Wang
[PATCH] drm/i915/gvt: Refine dmabuf_obj cleanup process Tina Zhang
- [PATCH] drm/i915/gvt: Refine dmabuf_obj cleanup process Zhenyu Wang
[PATCH] drm/i915/gvt/kvmgt: fill info for ROM/VGA region Pei Zhang
- [PATCH] drm/i915/gvt/kvmgt: fill info for ROM/VGA region Zhenyu Wang
[PATCH v2] drm/i915/gvt: refine function emulate_mmio_read/write Pei Zhang
- [PATCH v2] drm/i915/gvt: refine function emulate_mmio_read/write Zhenyu Wang
  - [PATCH v2] drm/i915/gvt: refine function emulate_mmio_read/write Zhang, Pei
[Rfc PATCH] ui: Enable SDL to use dma-buf for direct guest framebuffer rendering Tina Zhang
- [Rfc PATCH] ui: Enable SDL to use dma-buf for direct guest framebuffer rendering Zhang, Tina
[PATCH] drm/i915/gvt/fb_decoder: Fix out-of-bounds read Gustavo A. R. Silva
- [PATCH] drm/i915/gvt/fb_decoder: Fix out-of-bounds read Zhenyu Wang
  - [PATCH] drm/i915/gvt/fb_decoder: Fix out-of-bounds read Gustavo A. R. Silva
[PATCH 0/3] mmio save restore refine in vgpu switch Weinan Li
- [PATCH 2/3] drm/i915/gvt: refine mocs save restore policy Weinan Li
- [PATCH 3/3] drm/i915/gvt: load host render mocs once in mocs switch Weinan Li
- [PATCH 0/3] mmio save restore refine in vgpu switch Du, Changbin
  - [PATCH 0/3] mmio save restore refine in vgpu switch Li, Weinan Z
[PATCH 1/3] drm/i915/gvt: optimize for vGPU mmio switch Weinan Li
[PATCH v3] drm/i915/gvt: refine function emulate_mmio_read/write pei.zhang at intel.com
[PATCH v4] drm/i915/gvt: refine function emulate_mmio_read/write pei.zhang at intel.com
- [PATCH v4] drm/i915/gvt: refine function emulate_mmio_read/write Zhenyu Wang
[Intel-gfx] linux-next: Signed-off-by missing for commit in the drm-intel-fixes tree Joonas Lahtinen
- [Intel-gfx] linux-next: Signed-off-by missing for commit in the drm-intel-fixes tree Daniel Vetter
[PATCH] drm/i915/gvt: Remove the redundant range checking Tina Zhang
- [PATCH] drm/i915/gvt: Remove the redundant range checking Zhang, Tina
[PATCH] vfio: Simplify capability helper Alex Williamson
- [PATCH] vfio: Simplify capability helper Alexey Kardashevskiy
  - [PATCH] vfio: Simplify capability helper Zhenyu Wang
    - [PATCH] vfio: Simplify capability helper Kirti Wankhede
- [PATCH] vfio: Simplify capability helper Peter Xu
  - [PATCH] vfio: Simplify capability helper Auger Eric
    - [PATCH] vfio: Simplify capability helper Auger Eric
    - [PATCH] vfio: Simplify capability helper Peter Xu
    - [PATCH] vfio: Simplify capability helper Alex Williamson
    - [PATCH] vfio: Simplify capability helper Peter Xu
- [PATCH] vfio: Simplify capability helper Auger Eric
[PATCH v2 0/4] mmio save restore refine in vgpu switch Weinan Li
- [PATCH v2 4/4] drm/i915/gvt: load host render mocs once in mocs switch Weinan Li
- [PATCH v2 0/4] mmio save restore refine in vgpu switch Zhenyu Wang
[PATCH v2 1/4] drm/i915/gvt: refine trace_render_mmio Weinan Li
[PATCH v2 2/4] drm/i915/gvt: optimize for vGPU mmio switch Weinan Li
[PATCH v2 3/4] drm/i915/gvt: refine mocs save restore policy Weinan Li
[PATCH] drm/i915/gvt: Refine rang checking and info dump Tina Zhang
- [PATCH] drm/i915/gvt: Refine rang checking and info dump Zhenyu Wang
  - [PATCH] drm/i915/gvt: Refine rang checking and info dump Zhang, Tina
    - [PATCH] drm/i915/gvt: Refine rang checking and info dump Zhang, Tina
[PATCH] drm/i915/gvt: Refine PPGTT handling during vGPU reset. Zhi Wang
- [PATCH] drm/i915/gvt: Refine PPGTT handling during vGPU reset. Zhenyu Wang
  - [PATCH] drm/i915/gvt: Refine PPGTT handling during vGPU reset. Wang, Zhi A
[PULL] more gvt-next for 4.16 Zhenyu Wang
- [Intel-gfx] [PULL] more gvt-next for 4.16 Rodrigo Vivi
- [PULL] more gvt-next for 4.16 Zhenyu Wang
  - [PULL] more gvt-next for 4.16 Rodrigo Vivi
    - [PULL] more gvt-next for 4.16 Zhenyu Wang
    - [PULL] more gvt-next for 4.16 Jani Nikula
    - [PULL] more gvt-next for 4.16 Zhenyu Wang
    - [PULL] more gvt-next for 4.16 Rodrigo Vivi
[PATCH] drm/i915/gvt: Avoid info flood for untracked mmio Zhao Xinda
[PATCH] drm/i915/gvt: Support BAR0 qword access Tina Zhang
- [PATCH] drm/i915/gvt: Support BAR0 qword access Zhang, Xiong Y
  - [PATCH] drm/i915/gvt: Support BAR0 qword access Zhang, Tina
    - [PATCH] drm/i915/gvt: Support BAR0 qword access Zhenyu Wang
    - [PATCH] drm/i915/gvt: Support BAR0 qword access Zhang, Tina
    - [PATCH] drm/i915/gvt: Support BAR0 qword access Zhenyu Wang
    - [PATCH] drm/i915/gvt: Support BAR0 qword access Zhang, Tina
[PATCH v2] drm/i915/gvt: move write protect handler out of mmio emulation function Zhenyu Wang
- [PATCH v2] drm/i915/gvt: move write protect handler out of mmio emulation function Zhang, Xiong Y
- [PATCH v2] drm/i915/gvt: move write protect handler out of mmio emulation function Du, Changbin
[PATCH] drm/i915/gvt: handle partial GGTT PTE update hang.yuan at intel.com
[PATCH] drm/i915/gvt: always use i915_reg_t for MMIO handler definition Zhenyu Wang
- [PATCH] drm/i915/gvt: cleanup usage for typed mmio reg vs. offset Zhenyu Wang
  - [PATCH v2] drm/i915/gvt: cleanup usage for typed mmio reg vs. offset Zhenyu Wang
  - [PATCH] drm/i915/gvt: cleanup usage for typed mmio reg vs. offset Wang, Zhi A
- [PATCH] drm/i915/gvt: always use i915_reg_t for MMIO handler definition Zhenyu Wang
- [PATCH] drm/i915/gvt: always use i915_reg_t for MMIO handler definition Wang, Zhi A
[PATCH v2] drm/i915/gvt: Refine rang checking and info dump Tina Zhang
- [PATCH v2] drm/i915/gvt: Refine rang checking and info dump Zhenyu Wang
[PATCH 00/22] drm/i915/gvt: Add support for huge gtt (2M/64K) changbin.du at intel.com
- [PATCH 01/22] drm/i915/gvt: Rework shadow graphic memory management code changbin.du at intel.com
- [PATCH 02/22] drm/i915/gvt: Add verbose gtt shadow logs changbin.du at intel.com
- [PATCH 03/22] drm/i915/gvt: Rename ggtt related functions to be more specific changbin.du at intel.com
- [PATCH 04/22] drm/i915/gvt: Factor out intel_vgpu_{get_or_create_ppgtt_mm, find_destroy_ppgtt_mm} interfaces changbin.du at intel.com
- [PATCH 05/22] drm/i915/gvt: Use standard pte bit definition changbin.du at intel.com
- [PATCH 06/22] drm/i915/gvt: Refine pte shadowing process changbin.du at intel.com
- [PATCH 07/22] drm/i915/gvt: Rework shadow page management code changbin.du at intel.com
- [PATCH 08/22] drm/i915/gvt: Define PTE addr mask with GENMASK_ULL changbin.du at intel.com
- [PATCH 09/22] drm/i915/gvt: Add new 64K entry type changbin.du at intel.com
- [PATCH 10/22] drm/i915/gvt: Add PTE IPS bit operations changbin.du at intel.com
- [PATCH 11/22] drm/i915/gvt: Handle MMIO GEN8_GAMW_ECO_DEV_RW_IA for 64K GTT changbin.du at intel.com
- [PATCH 12/22] drm/i915/gvt: Detect 64K gtt entry by IPS bit of PDE changbin.du at intel.com
- [PATCH 13/22] drm/i915/gvt: Add software PTE flag to mark special 64K splited entry changbin.du at intel.com
- [PATCH 14/22] drm/i915/gvt: Add GTT clear_pse operation changbin.du at intel.com
- [PATCH 15/22] drm/i915/gvt: Split ppgtt_alloc_spt into two parts changbin.du at intel.com
- [PATCH 16/22] drm/i915/gvt: Make PTE iterator 64K entry aware changbin.du at intel.com
- [PATCH 17/22] drm/i915/gvt: Add 64K huge gtt support changbin.du at intel.com
- [PATCH 18/22] drm/i915/gvt: Add 2M huge gtt support changbin.du at intel.com
- [PATCH 19/22] drm/i915/gvt: Ignore guest write to unused PTE entries changbin.du at intel.com
- [PATCH 20/22] drm/i915/gvt: Handle special sequence on PDE IPS bit changbin.du at intel.com
- [PATCH 21/22] drm/i915/gvt: Fix error handling in ppgtt_populate_spt_by_guest_entry changbin.du at intel.com
- [PATCH 22/22] drm/i915: Enable platform support for vGPU huge gtt pages changbin.du at intel.com
  - [PATCH 22/22] drm/i915: Enable platform support for vGPU huge gtt pages Zhenyu Wang
    - [PATCH 22/22] drm/i915: Enable platform support for vGPU huge gtt pages Du, Changbin
    - [PATCH 22/22] drm/i915: Enable platform support for vGPU huge gtt pages Zhenyu Wang
    - [PATCH 22/22] drm/i915: Enable platform support for vGPU huge gtt pages Du, Changbin
[PATCH v2 00/22] drm/i915/gvt: Add support for huge gtt (2M/64K) changbin.du at intel.com
- [PATCH v2 01/22] drm/i915/gvt: Rework shadow graphic memory management code changbin.du at intel.com
  - [PATCH v2 01/22] drm/i915/gvt: Rework shadow graphic memory management code Zhenyu Wang
    - [PATCH v2 01/22] drm/i915/gvt: Rework shadow graphic memory management code Du, Changbin
- [PATCH v2 02/22] drm/i915/gvt: Add verbose gtt shadow logs changbin.du at intel.com
- [PATCH v2 03/22] drm/i915/gvt: Rename ggtt related functions to be more specific changbin.du at intel.com
- [PATCH v2 04/22] drm/i915/gvt: Factor out intel_vgpu_{get_or_create_ppgtt_mm, find_destroy_ppgtt_mm} interfaces changbin.du at intel.com
- [PATCH v2 05/22] drm/i915/gvt: Use standard pte bit definition changbin.du at intel.com
- [PATCH v2 06/22] drm/i915/gvt: Refine pte shadowing process changbin.du at intel.com
- [PATCH v2 07/22] drm/i915/gvt: Rework shadow page management code changbin.du at intel.com
- [PATCH v2 08/22] drm/i915/gvt: Define PTE addr mask with GENMASK_ULL changbin.du at intel.com
- [PATCH v2 09/22] drm/i915/gvt: Add new 64K entry type changbin.du at intel.com
- [PATCH v2 10/22] drm/i915/gvt: Add PTE IPS bit operations changbin.du at intel.com
- [PATCH v2 11/22] drm/i915/gvt: Handle MMIO GEN8_GAMW_ECO_DEV_RW_IA for 64K GTT changbin.du at intel.com
- [PATCH v2 12/22] drm/i915/gvt: Detect 64K gtt entry by IPS bit of PDE changbin.du at intel.com
- [PATCH v2 13/22] drm/i915/gvt: Add software PTE flag to mark special 64K splited entry changbin.du at intel.com
- [PATCH v2 14/22] drm/i915/gvt: Add GTT clear_pse operation changbin.du at intel.com
- [PATCH v2 15/22] drm/i915/gvt: Split ppgtt_alloc_spt into two parts changbin.du at intel.com
- [PATCH v2 16/22] drm/i915/gvt: Make PTE iterator 64K entry aware changbin.du at intel.com
- [PATCH v2 17/22] drm/i915/gvt: Add 64K huge gtt support changbin.du at intel.com
- [PATCH v2 18/22] drm/i915/gvt: Add 2M huge gtt support changbin.du at intel.com
- [PATCH v2 19/22] drm/i915/gvt: Ignore guest write to unused PTE entries changbin.du at intel.com
- [PATCH v2 20/22] drm/i915/gvt: Handle special sequence on PDE IPS bit changbin.du at intel.com
- [PATCH v2 21/22] drm/i915/gvt: Fix error handling in ppgtt_populate_spt_by_guest_entry changbin.du at intel.com
- [PATCH v2 22/22] drm/i915: Enable platform support for vGPU huge gtt pages changbin.du at intel.com
  - [PATCH v2 22/22] drm/i915: Enable platform support for vGPU huge gtt pages Zhenyu Wang
    - [PATCH v2 22/22] drm/i915: Enable platform support for vGPU huge gtt pages Du, Changbin
[RFC PATCH 01/60] hyper_dmabuf: initial working version of hyper_dmabuf drv Daniel Vetter
- [RFC PATCH 01/60] hyper_dmabuf: initial working version of hyper_dmabuf drv Matt Roper
  - [RFC PATCH 01/60] hyper_dmabuf: initial working version of hyper_dmabuf drv Tomeu Vizoso
[PATCH] drm/i915/gvt: Fix stack-out-of-bounds bug in cmd parser changbin.du at intel.com
[PULL] gvt-fixes for 4.15 Zhenyu Wang
- [PULL] gvt-fixes for 4.15 Jani Nikula
[PATCH] drm/i915/gvt: add PLANE_KEYMAX regs to mmio track list pei.zhang at intel.com
- [PATCH] drm/i915/gvt: add PLANE_KEYMAX regs to mmio track list Zhenyu Wang
[PATCH] drm/i915: Do not enable movntdqa optimization in hypervisor guest changbin.du at intel.com
- [PATCH] drm/i915: Do not enable movntdqa optimization in hypervisor guest Chris Wilson
  - [PATCH] drm/i915: Do not enable movntdqa optimization in hypervisor guest Du, Changbin
[PATCH v3 00/22] drm/i915/gvt: Add support for huge gtt (2M/64K) changbin.du at intel.com
- [PATCH v3 01/22] drm/i915/gvt: Rework shadow graphic memory management code changbin.du at intel.com
- [PATCH v3 02/22] drm/i915/gvt: Add verbose gtt shadow logs changbin.du at intel.com
- [PATCH v3 03/22] drm/i915/gvt: Rename ggtt related functions to be more specific changbin.du at intel.com
- [PATCH v3 04/22] drm/i915/gvt: Factor out intel_vgpu_{get_or_create_ppgtt_mm, find_destroy_ppgtt_mm} interfaces changbin.du at intel.com
- [PATCH v3 05/22] drm/i915/gvt: Use standard pte bit definition changbin.du at intel.com
- [PATCH v3 06/22] drm/i915/gvt: Refine pte shadowing process changbin.du at intel.com
- [PATCH v3 07/22] drm/i915/gvt: Rework shadow page management code changbin.du at intel.com
- [PATCH v3 08/22] drm/i915/gvt: Define PTE addr mask with GENMASK_ULL changbin.du at intel.com
- [PATCH v3 09/22] drm/i915/gvt: Add new 64K entry type changbin.du at intel.com
- [PATCH v3 10/22] drm/i915/gvt: Add PTE IPS bit operations changbin.du at intel.com
- [PATCH v3 11/22] drm/i915/gvt: Handle MMIO GEN8_GAMW_ECO_DEV_RW_IA for 64K GTT changbin.du at intel.com
- [PATCH v3 12/22] drm/i915/gvt: Detect 64K gtt entry by IPS bit of PDE changbin.du at intel.com
- [PATCH v3 13/22] drm/i915/gvt: Add software PTE flag to mark special 64K splited entry changbin.du at intel.com
- [PATCH v3 14/22] drm/i915/gvt: Add GTT clear_pse operation changbin.du at intel.com
- [PATCH v3 15/22] drm/i915/gvt: Split ppgtt_alloc_spt into two parts changbin.du at intel.com
- [PATCH v3 16/22] drm/i915/gvt: Make PTE iterator 64K entry aware changbin.du at intel.com
- [PATCH v3 17/22] drm/i915/gvt: Add 64K huge gtt support changbin.du at intel.com
- [PATCH v3 18/22] drm/i915/gvt: Add 2M huge gtt support changbin.du at intel.com
- [PATCH v3 19/22] drm/i915/gvt: Ignore guest write to unused PTE entries changbin.du at intel.com
- [PATCH v3 20/22] drm/i915/gvt: Handle special sequence on PDE IPS bit changbin.du at intel.com
- [PATCH v3 21/22] drm/i915/gvt: Fix error handling in ppgtt_populate_spt_by_guest_entry changbin.du at intel.com
- [PATCH v3 22/22] drm/i915: Enable platform support for vGPU huge gtt pages changbin.du at intel.com
[PATCH] drm/i915/gvt: validate gfn before set shadow page entry hang.yuan at intel.com
[PATCH][Security Check] drm/i915/gvt: Fix gen8/9_render_mmio_list[0] doesn't take effect Xiong Zhang
- [PATCH][Security Check] drm/i915/gvt: Fix gen8/9_render_mmio_list[0] doesn't take effect Zhenyu Wang
  - [PATCH v2] drm/i915/gvt: Fix gen8/9_render_mmio_list[0] don't take effect Xiong Zhang
    - [PATCH v2] drm/i915/gvt: Fix gen8/9_render_mmio_list[0] don't take effect Zhenyu Wang
    - [PATCH v3] drm/i915/gvt: Fix gen8/9_render_mmio_list[0] don't take effect Xiong Zhang
    - [PATCH v3] drm/i915/gvt: Fix gen8/9_render_mmio_list[0] don't take effect Zhenyu Wang
[PATCH v2] drm/i915: Do not enable movntdqa optimization in hypervisor guest changbin.du at intel.com
[intel-gvt-linux:topic/gvt-xengt 5/31] include/xen/arm/interface.h:22:35: error: unknown type name '__guest_handle_ulong' kbuild test robot
[PATCH 0/9] drm/i915/gvt: Refine the gtt shadowing changbin.du at intel.com
- [PATCH 1/9] drm/i915/gvt: Rework shadow graphic memory management code changbin.du at intel.com
- [PATCH 2/9] drm/i915/gvt: Add verbose gtt shadow logs changbin.du at intel.com
  - [PATCH 2/9] drm/i915/gvt: Add verbose gtt shadow logs Zhi Wang
- [PATCH 3/9] drm/i915/gvt: Rename ggtt related functions to be more specific changbin.du at intel.com
  - [PATCH 3/9] drm/i915/gvt: Rename ggtt related functions to be more specific Zhi Wang
- [PATCH 4/9] drm/i915/gvt: Factor out intel_vgpu_{get_or_create_ppgtt_mm, find_destroy_ppgtt_mm} interfaces changbin.du at intel.com
  - [PATCH 4/9] drm/i915/gvt: Factor out intel_vgpu_{get_or_create_ppgtt_mm, find_destroy_ppgtt_mm} interfaces Zhi Wang
- [PATCH 5/9] drm/i915/gvt: Use standard pte bit definition changbin.du at intel.com
  - [PATCH 5/9] drm/i915/gvt: Use standard pte bit definition Zhi Wang
    - [PATCH 5/9] drm/i915/gvt: Use standard pte bit definition Du, Changbin
    - [PATCH 5/9] drm/i915/gvt: Use standard pte bit definition Zhi Wang
    - [PATCH 5/9] drm/i915/gvt: Use standard pte bit definition Du, Changbin
    - [PATCH 5/9] drm/i915/gvt: Use standard pte bit definition Zhi Wang
    - [PATCH 5/9] drm/i915/gvt: Use standard pte bit definition Zhi Wang
- [PATCH 6/9] drm/i915/gvt: Refine pte shadowing process changbin.du at intel.com
  - [PATCH 6/9] drm/i915/gvt: Refine pte shadowing process Zhi Wang
- [PATCH 7/9] drm/i915/gvt: Rework shadow page management code changbin.du at intel.com
  - [PATCH 7/9] drm/i915/gvt: Rework shadow page management code Zhi Wang
- [PATCH 8/9] drm/i915/gvt: Manage shadow pages with radix tree changbin.du at intel.com
  - [PATCH 8/9] drm/i915/gvt: Manage shadow pages with radix tree Zhi Wang
    - [PATCH 8/9] drm/i915/gvt: Manage shadow pages with radix tree Du, Changbin
    - [PATCH 8/9] drm/i915/gvt: Manage shadow pages with radix tree Zhi Wang
    - [PATCH 8/9] drm/i915/gvt: Manage shadow pages with radix tree Zhi Wang
    - [PATCH 8/9] drm/i915/gvt: Manage shadow pages with radix tree Zhi Wang
    - [PATCH 8/9] drm/i915/gvt: Manage shadow pages with radix tree Du, Changbin
- [PATCH 9/9] drm/i915/gvt: Define PTE addr mask with GENMASK_ULL changbin.du at intel.com
  - [PATCH 9/9] drm/i915/gvt: Define PTE addr mask with GENMASK_ULL Zhi Wang
    - [PATCH 9/9] drm/i915/gvt: Define PTE addr mask with GENMASK_ULL Zhi Wang
- [PATCH 0/9] drm/i915/gvt: Refine the gtt shadowing Zhi Wang
  - [PATCH 0/9] drm/i915/gvt: Refine the gtt shadowing Du, Changbin
    - [PATCH 0/9] drm/i915/gvt: Refine the gtt shadowing Zhi Wang
    - [PATCH 0/9] drm/i915/gvt: Refine the gtt shadowing Du, Changbin
    - [PATCH 0/9] drm/i915/gvt: Refine the gtt shadowing Zhi Wang
    - [PATCH 0/9] drm/i915/gvt: Refine the gtt shadowing Zhi Wang
    - [PATCH 0/9] drm/i915/gvt: Refine the gtt shadowing Du, Changbin
    - [PATCH 0/9] drm/i915/gvt: Refine the gtt shadowing Zhi Wang
- [PATCH 0/9] drm/i915/gvt: Refine the gtt shadowing Zhi Wang
  - [PATCH 0/9] drm/i915/gvt: Refine the gtt shadowing Zhenyu Wang
    - [PATCH 0/9] drm/i915/gvt: Refine the gtt shadowing Du, Changbin
    - [PATCH 0/9] drm/i915/gvt: Refine the gtt shadowing Zhi Wang
    - [PATCH 0/9] drm/i915/gvt: Refine the gtt shadowing Yuan, Hang
[PATCH] drm/i915/gvt: Clear the shadow page table entry after post-sync Zhi Wang
- [PATCH] drm/i915/gvt: Clear the shadow page table entry after post-sync Zhenyu Wang
- [PATCH] drm/i915/gvt: Clear the shadow page table entry after post-sync Zhi Wang
[intel-gvt-linux:topic/gvt-xengt 22/31] drivers/gpu/drm/i915/gvt/gvt.h:434:28: error: invalid operands to binary + (have 'void *' and 'i915_reg_t {aka const struct <anonymous>}') kbuild test robot
[intel-gvt-linux:topic/gvt-xengt 23/31] drivers/gpu/drm/i915/gvt/vgpu.c:498:14: note: in expansion of macro 'vgpu_vreg' kbuild test robot
[intel-gvt-linux:topic/gvt-xengt 25/31] drivers/gpu/drm/i915/gvt/migrate.c:427:26: error: implicit declaration of function 'INTEL_GVT_MMIO_OFFSET' kbuild test robot
[intel-gvt-linux:topic/gvt-xengt 25/31] drivers/gpu/drm/i915/gvt/migrate.c:427:26: error: implicit declaration of function 'INTEL_GVT_MMIO_OFFSET'; did you mean 'INTEL_GVT_MAX_PIPE'? kbuild test robot
[PATCH v2] drm/i915/gvt: add PLANE_KEYMAX regs to mmio track list pei.zhang at intel.com
- [PATCH v2] drm/i915/gvt: add PLANE_KEYMAX regs to mmio track list Zhenyu Wang
Unable to get GVT work with KVMGT Tobias Junghans

Last message date: Sun Dec 31 15:12:58 UTC 2017
Archived on: Sun Dec 31 15:13:01 UTC 2017

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