gvt: refine function emulate_mmio_read/write

Zhang, Pei pei.zhang at intel.com
Fri Dec 8 03:06:25 UTC 2017


> -----Original Message-----
> From: Zhenyu Wang [mailto:zhenyuw at linux.intel.com]
> Sent: Friday, December 8, 2017 10:52 AM
> To: Zhang, Pei <pei.zhang at intel.com>
> Cc: intel-gvt-dev at lists.freedesktop.org
> Subject: Re: gvt: refine function emulate_mmio_read/write
> 
> On 2017.12.06 15:50:34 +0800, Pei Zhang wrote:
> > These 2 functions are coded by multiple person in multiple patches.
> > The 'return' and 'goto err' are mix-used in same place, which cause
> > the function looks disorder. Unify to use only 'goto' so that the gvt
> > lock is acquired in one place and released in one place.
> >
> > Signed-off-by: Pei Zhang <pei.zhang at intel.com>
> > ---
> >  drivers/gpu/drm/i915/gvt/mmio.c | 32 ++++++++++++++------------------
> >  1 file changed, 14 insertions(+), 18 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gvt/mmio.c
> > b/drivers/gpu/drm/i915/gvt/mmio.c index 980ec89..24f9c2f 100644
> > --- a/drivers/gpu/drm/i915/gvt/mmio.c
> > +++ b/drivers/gpu/drm/i915/gvt/mmio.c
> > @@ -126,13 +126,12 @@ int intel_vgpu_emulate_mmio_read(struct
> intel_vgpu *vgpu, uint64_t pa,
> >  	unsigned int offset = 0;
> >  	int ret = -EINVAL;
> >
> > -
> >  	if (vgpu->failsafe) {
> >  		failsafe_emulate_mmio_rw(vgpu, pa, p_data, bytes, true);
> >  		return 0;
> >  	}
> > -	mutex_lock(&gvt->lock);
> >
> > +	mutex_lock(&gvt->lock);
> >  	if (atomic_read(&vgpu->gtt.n_write_protected_guest_page)) {
> >  		struct intel_vgpu_guest_page *gp;
> >
> > @@ -146,8 +145,7 @@ int intel_vgpu_emulate_mmio_read(struct intel_vgpu
> *vgpu, uint64_t pa,
> >  					ret, gp->gfn, pa, *(u32 *)p_data,
> >  					bytes);
> >  			}
> > -			mutex_unlock(&gvt->lock);
> > -			return ret;
> > +			goto out;
> >  		}
> >  	}
> >
> > @@ -168,14 +166,12 @@ int intel_vgpu_emulate_mmio_read(struct
> intel_vgpu *vgpu, uint64_t pa,
> >  				p_data, bytes);
> >  		if (ret)
> >  			goto err;
> > -		mutex_unlock(&gvt->lock);
> > -		return ret;
> > +		goto out;
> >  	}
> >
> >  	if (WARN_ON_ONCE(!reg_is_mmio(gvt, offset))) {
> >  		ret = intel_gvt_hypervisor_read_gpa(vgpu, pa, p_data, bytes);
> > -		mutex_unlock(&gvt->lock);
> > -		return ret;
> > +		goto out;
> >  	}
> >
> >  	if (WARN_ON(!reg_is_mmio(gvt, offset + bytes - 1))) @@ -191,11
> > +187,13 @@ int intel_vgpu_emulate_mmio_read(struct intel_vgpu *vgpu,
> uint64_t pa,
> >  		goto err;
> >
> >  	intel_gvt_mmio_set_accessed(gvt, offset);
> > -	mutex_unlock(&gvt->lock);
> > -	return 0;
> > +	ret = 0;
> > +	goto out;
> > +
> >  err:
> >  	gvt_vgpu_err("fail to emulate MMIO read %08x len %d\n",
> >  			offset, bytes);
> > +out:
> >  	mutex_unlock(&gvt->lock);
> >  	return ret;
> >  }
> 
> Please fix patch title as "drm/i915/gvt: xxx" and I think it's better we
> set error reason for each fail instead of using -EINVAL everywhere if
> someday we really need to check return fail reason, e.g
[Pei] sure, will change the title. 
For the error reason, I agree that you are correct. But in this function, EINVAL is the default value of local parameter 'ret', it would get different values in different sub-function calls before calling 'goto'. For success case, the return value will be 0.

> 
> diff --git a/drivers/gpu/drm/i915/gvt/mmio.c
> b/drivers/gpu/drm/i915/gvt/mmio.c index 4ea0feb5f04d..9759c247a65d
> 100644
> --- a/drivers/gpu/drm/i915/gvt/mmio.c
> +++ b/drivers/gpu/drm/i915/gvt/mmio.c
> @@ -155,19 +155,18 @@ int intel_vgpu_emulate_mmio_read(struct intel_vgpu
> *vgpu, uint64_t pa,  {
>  	struct intel_gvt *gvt = vgpu->gvt;
>  	unsigned int offset = 0;
> -	int ret = -EINVAL;
> -
> +	int ret = 0;
> 
>  	if (vgpu->failsafe) {
>  		failsafe_emulate_mmio_rw(vgpu, pa, p_data, bytes, true);
>  		return 0;
>  	}
> +
>  	mutex_lock(&gvt->lock);
> 
>  	if (vgpu_gpa_is_aperture(vgpu, pa)) {
>  		ret = vgpu_aperture_rw(vgpu, pa, p_data, bytes, true);
> -		mutex_unlock(&gvt->lock);
> -		return ret;
> +		goto out;
>  	}
> 
>  	if (atomic_read(&vgpu->gtt.n_tracked_guest_page)) { @@ -183,56
> +182,56 @@ int intel_vgpu_emulate_mmio_read(struct intel_vgpu *vgpu,
> uint64_t pa,
>  					ret, t->gfn, pa, *(u32 *)p_data,
>  					bytes);
>  			}
> -			mutex_unlock(&gvt->lock);
> -			return ret;
> +			goto out;
>  		}
>  	}
> 
>  	offset = intel_vgpu_gpa_to_mmio_offset(vgpu, pa);
> 
> -	if (WARN_ON(bytes > 8))
> -		goto err;
> +	if (WARN_ON(bytes > 8)) {
> +		ret = -EINVAL;
> +		goto out;
> +	}
> 
>  	if (reg_is_gtt(gvt, offset)) {
> +		ret = -EINVAL;
>  		if (WARN_ON(!IS_ALIGNED(offset, 4) && !IS_ALIGNED(offset, 8)))
> -			goto err;
> +			goto out;
>  		if (WARN_ON(bytes != 4 && bytes != 8))
> -			goto err;
> +			goto out;
>  		if (WARN_ON(!reg_is_gtt(gvt, offset + bytes - 1)))
> -			goto err;
> +			goto out;
> 
>  		ret = intel_vgpu_emulate_gtt_mmio_read(vgpu, offset,
>  				p_data, bytes);
> -		if (ret)
> -			goto err;
> -		mutex_unlock(&gvt->lock);
> -		return ret;
> +		goto out;
>  	}
> 
>  	if (WARN_ON_ONCE(!reg_is_mmio(gvt, offset))) {
>  		ret = intel_gvt_hypervisor_read_gpa(vgpu, pa, p_data, bytes);
> -		mutex_unlock(&gvt->lock);
> -		return ret;
> +		goto out;
>  	}
> 
> -	if (WARN_ON(!reg_is_mmio(gvt, offset + bytes - 1)))
> -		goto err;
> +	if (WARN_ON(!reg_is_mmio(gvt, offset + bytes - 1))) {
> +		ret = -EFAULT;
> +		goto out;
> +	}
> 
>  	if (!intel_gvt_mmio_is_unalign(gvt, offset)) {
> -		if (WARN_ON(!IS_ALIGNED(offset, bytes)))
> -			goto err;
> +		if (WARN_ON(!IS_ALIGNED(offset, bytes))) {
> +			ret = -EINVAL;
> +			goto out;
>  	}
> 
>  	ret = intel_vgpu_mmio_reg_rw(vgpu, offset, p_data, bytes, true);
>  	if (ret < 0)
> -		goto err;
> +		goto out;
> 
>  	intel_gvt_mmio_set_accessed(gvt, offset);
> -	mutex_unlock(&gvt->lock);
> -	return 0;
> -err:
> -	gvt_vgpu_err("fail to emulate MMIO read %08x len %d\n",
> -			offset, bytes);
> +out:
> +	if (ret)
> +		gvt_vgpu_err("fail to emulate MMIO read %08x len %d\n",
> +			     offset, bytes);
>  	mutex_unlock(&gvt->lock);
>  	return ret;
>  }
> 
> 
> --
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> 
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