[PATCH] drm/i915/gvt: Refine PPGTT handling during vGPU reset.

[Wang, Zhi A]

As you wish, if you want two patches.

-----Original Message-----
From: Zhenyu Wang [mailto:zhenyuw at linux.intel.com] 
Sent: Thursday, December 14, 2017 5:15 AM
To: Zhi Wang <zhi.wang.linux at gmail.com>
Cc: intel-gvt-dev at lists.freedesktop.org; Wang, Zhi A <zhi.a.wang at intel.com>
Subject: Re: [PATCH] drm/i915/gvt: Refine PPGTT handling during vGPU reset.

On 2017.12.13 16:00:55 +0800, Zhi Wang wrote:
> As different OS might handling PPGTT differently during vGPU reset, a 
> better handling logics is invalidating all PPGTT instance during vGPU 
> reset.
> 
> This patch fixes a bug of windows driver failing to install.
> 
> Signed-off-by: Zhi Wang <zhi.a.wang at intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/gtt.c       | 24 +++++++++++++++++++++++-
>  drivers/gpu/drm/i915/gvt/gtt.h       |  1 +
>  drivers/gpu/drm/i915/gvt/scheduler.c | 28 +++++++++++++++++++++++++---
>  drivers/gpu/drm/i915/gvt/vgpu.c      |  1 +
>  4 files changed, 50 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/gtt.c 
> b/drivers/gpu/drm/i915/gvt/gtt.c index 71a0f2b..469925f 100644
> --- a/drivers/gpu/drm/i915/gvt/gtt.c
> +++ b/drivers/gpu/drm/i915/gvt/gtt.c
> @@ -1535,7 +1535,7 @@ void intel_vgpu_destroy_mm(struct kref *mm_ref)
>  	list_del(&mm->list);
>  	list_del(&mm->lru_list);
>  
> -	if (mm->has_shadow_page_table)
> +	if (mm->has_shadow_page_table && mm->shadowed)
>  		invalidate_mm(mm);
>  
>  	gtt->mm_free_page_table(mm);
> @@ -2376,6 +2376,28 @@ void intel_gvt_clean_gtt(struct intel_gvt *gvt)  
> }
>  
>  /**
> + * intel_vgpu_invalidate_ppgtt - invalidate PPGTT instances
> + * @vgpu: a vGPU
> + *
> + * This function is called when invalidate all PPGTT instances of a vGPU.
> + *
> + */
> +void intel_vgpu_invalidate_ppgtt(struct intel_vgpu *vgpu) {
> +	struct list_head *pos, *n;
> +	struct intel_vgpu_mm *mm;
> +
> +	list_for_each_safe(pos, n, &vgpu->gtt.mm_list_head) {
> +		mm = container_of(pos, struct intel_vgpu_mm, list);
> +		if (mm->type == INTEL_GVT_MM_PPGTT) {
> +			list_del_init(&mm->lru_list);
> +			if (mm->has_shadow_page_table && mm->shadowed)
> +				invalidate_mm(mm);
> +		}
> +	}
> +}
> +
> +/**
>   * intel_vgpu_reset_ggtt - reset the GGTT entry
>   * @vgpu: a vGPU
>   *
> diff --git a/drivers/gpu/drm/i915/gvt/gtt.h 
> b/drivers/gpu/drm/i915/gvt/gtt.h index f98c1c1..d17f9ec 100644
> --- a/drivers/gpu/drm/i915/gvt/gtt.h
> +++ b/drivers/gpu/drm/i915/gvt/gtt.h
> @@ -208,6 +208,7 @@ struct intel_vgpu_gtt {  extern int 
> intel_vgpu_init_gtt(struct intel_vgpu *vgpu);  extern void 
> intel_vgpu_clean_gtt(struct intel_vgpu *vgpu);  void 
> intel_vgpu_reset_ggtt(struct intel_vgpu *vgpu);
> +void intel_vgpu_invalidate_ppgtt(struct intel_vgpu *vgpu);
>  
>  extern int intel_gvt_init_gtt(struct intel_gvt *gvt);  void 
> intel_vgpu_reset_gtt(struct intel_vgpu *vgpu); diff --git 
> a/drivers/gpu/drm/i915/gvt/scheduler.c 
> b/drivers/gpu/drm/i915/gvt/scheduler.c
> index 0056638..deb12e7 100644
> --- a/drivers/gpu/drm/i915/gvt/scheduler.c
> +++ b/drivers/gpu/drm/i915/gvt/scheduler.c
> @@ -52,6 +52,29 @@ static void set_context_pdp_root_pointer(
>  		pdp_pair[i].val = pdp[7 - i];
>  }
>  
> +static void update_shadow_pdps(struct intel_vgpu_workload *workload) 
> +{
> +	struct intel_vgpu *vgpu = workload->vgpu;
> +	int ring_id = workload->ring_id;
> +	struct i915_gem_context *shadow_ctx = vgpu->submission.shadow_ctx;
> +	struct drm_i915_gem_object *ctx_obj =
> +		shadow_ctx->engine[ring_id].state->obj;
> +	struct execlist_ring_context *shadow_ring_context;
> +	struct page *page;
> +
> +	if (WARN_ON(!workload->shadow_mm))
> +		return;
> +
> +	if (WARN_ON(!atomic_read(&workload->shadow_mm->pincount)))
> +		return;
> +
> +	page = i915_gem_object_get_page(ctx_obj, LRC_STATE_PN);
> +	shadow_ring_context = kmap(page);
> +	set_context_pdp_root_pointer(shadow_ring_context,
> +			workload->shadow_mm->shadow_page_table);
> +	kunmap(page);
> +}
> +
>  static int populate_shadow_context(struct intel_vgpu_workload 
> *workload)  {
>  	struct intel_vgpu *vgpu = workload->vgpu; @@ -112,9 +135,6 @@ static 
> int populate_shadow_context(struct intel_vgpu_workload *workload)
>  	}
>  #undef COPY_REG
>  
> -	set_context_pdp_root_pointer(shadow_ring_context,
> -				     workload->shadow_mm->shadow_page_table);
> -
>  	intel_gvt_hypervisor_read_gpa(vgpu,
>  			workload->ring_context_gpa +
>  			sizeof(*shadow_ring_context),
> @@ -504,6 +524,8 @@ static int prepare_workload(struct intel_vgpu_workload *workload)
>  		return ret;
>  	}
>  
> +	update_shadow_pdps(workload);
> +

By moving pdp update from shadow to submit time, shouldn't this be another seperate patch?

>  	ret = intel_vgpu_sync_oos_pages(workload->vgpu);
>  	if (ret) {
>  		gvt_vgpu_err("fail to vgpu sync oos pages\n"); diff --git 
> a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c 
> index 3992617..7c00f31 100644
> --- a/drivers/gpu/drm/i915/gvt/vgpu.c
> +++ b/drivers/gpu/drm/i915/gvt/vgpu.c
> @@ -519,6 +519,7 @@ void intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr,
>  	/* full GPU reset or device model level reset */
>  	if (engine_mask == ALL_ENGINES || dmlr) {
>  		intel_vgpu_select_submission_ops(vgpu, 0);
> +		intel_vgpu_invalidate_ppgtt(vgpu);
>  
>  		/*fence will not be reset during virtual reset */
>  		if (dmlr) {
> --
> 2.7.4
> 
> _______________________________________________
> intel-gvt-dev mailing list
> intel-gvt-dev at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev

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