[PATCH] drm/i915/gvt: Support BAR0 qword access

[Zhenyu Wang]

On 2017.12.18 03:21:42 +0000, Zhang, Tina wrote:
> > 
> > On 2017.12.15 09:03:50 +0000, Zhang, Tina wrote:
> > > > Your patch will get qword pci config r/w which isn't allowed in our code.
> > > It won't touch pci configuration space, only BAR0.
> > > And the reason why we need this patch is that it can make dma-buf display
> > stable during guest booting up.
> > 
> > Could you elaborate on the problem?
> During guest boot, the guest fb shown by Spice or GTK, would be in a mess and uncontrolled. It might make the host whole screen look like dumb for more than 1min, but w/o GPU HANG.
> With this patch, during guest booting, the guest fb will be black as there is no content to show and won't give the dumb face to users.

ok, that's the symptom, what's the cause of this?

> 
> 
> > 
> > This makes me recall https://lists.freedesktop.org/archives/intel-gvt-dev/2017-
> > August/001578.html,
> > and how about the concern from that thread?
> > 
> > > > > -----Original Message-----
> > > > > From: intel-gvt-dev
> > > > > [mailto:intel-gvt-dev-bounces at lists.freedesktop.org] On Behalf Of
> > > > > Tina Zhang
> > > > > Sent: Friday, December 15, 2017 4:44 PM
> > > > > Cc: Yuan, Hang <hang.yuan at intel.com>;
> > > > > intel-gvt-dev at lists.freedesktop.org;
> > > > > Wang, Zhi A <zhi.a.wang at intel.com>; Zhenyu Wang
> > > > > <zhenyuw at linux.intel.com>; Zhang, Tina <tina.zhang at intel.com>
> > > > > Subject: [PATCH] drm/i915/gvt: Support BAR0 qword access
> > > > >
> > > > > GGTT is in BAR0 with qword aligned. With a qemu patch (commit:
> > > > > 38d49e8c1523d97d2191190d3f7b4ce7a0ab5aa3), VFIO can use 8-byte
> > > > reads/
> > > > > writes to access it.
> > > > >
> > > > > This patch is to enable BAR0 to support the qword accessing.
> > > > >
> > > > > This patch can also remove some error log about "vfio_pin_pages failed"
> > > > > which cased by partial updating GGTT entry.
> > > > >
> > > > > Signed-off-by: Tina Zhang <tina.zhang at intel.com>
> > > > > Cc: Zhenyu Wang <zhenyuw at linux.intel.com>
> > > > > Cc: Zhi Wang <zhi.a.wang at intel.com>
> > > > > Cc: Hang Yuan <hang.yuan at intel.com>
> > > > > ---
> > > > >  drivers/gpu/drm/i915/gvt/kvmgt.c | 32
> > > > > ++++++++++++++++++++++++++++++--
> > > > >  1 file changed, 30 insertions(+), 2 deletions(-)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/i915/gvt/kvmgt.c
> > > > > b/drivers/gpu/drm/i915/gvt/kvmgt.c
> > > > > index b8a85e0..4f7c0d7 100644
> > > > > --- a/drivers/gpu/drm/i915/gvt/kvmgt.c
> > > > > +++ b/drivers/gpu/drm/i915/gvt/kvmgt.c
> > > > > @@ -705,12 +705,26 @@ static ssize_t intel_vgpu_read(struct
> > > > > mdev_device *mdev, char __user *buf,
> > > > >  			size_t count, loff_t *ppos)
> > > > >  {
> > > > >  	unsigned int done = 0;
> > > > > +	unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
> > > > >  	int ret;
> > > > >
> > > > >  	while (count) {
> > > > >  		size_t filled;
> > > > >
> > > > > -		if (count >= 4 && !(*ppos % 4)) {
> > > > > +		if (count >= 8 && !(*ppos % 8) &&
> > > > > +		    (index == VFIO_PCI_BAR0_REGION_INDEX)) {
> > > > > +			u64 val;
> > > > > +
> > > > > +			ret = intel_vgpu_rw(mdev, (char *)&val, sizeof(val),
> > > > > +					ppos, false);
> > > > > +			if (ret <= 0)
> > > > > +				goto read_err;
> > > > > +
> > > > > +			if (copy_to_user(buf, &val, sizeof(val)))
> > > > > +				goto read_err;
> > > > > +
> > > > > +			filled = 8;
> > > > > +		} else if (count >= 4 && !(*ppos % 4)) {
> > > > >  			u32 val;
> > > > >
> > > > >  			ret = intel_vgpu_rw(mdev, (char *)&val, sizeof(val),
> > > > @@
> > > > > -765,12 +779,26 @@ static ssize_t intel_vgpu_write(struct
> > > > > mdev_device *mdev,
> > > > >  				size_t count, loff_t *ppos)
> > > > >  {
> > > > >  	unsigned int done = 0;
> > > > > +	unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
> > > > >  	int ret;
> > > > >
> > > > >  	while (count) {
> > > > >  		size_t filled;
> > > > >
> > > > > -		if (count >= 4 && !(*ppos % 4)) {
> > > > > +		if (count >= 8 && !(*ppos % 8) &&
> > > > > +		    (index == VFIO_PCI_BAR0_REGION_INDEX)) {
> > > > > +			u64 val;
> > > > > +
> > > > > +			if (copy_from_user(&val, buf, sizeof(val)))
> > > > > +				goto write_err;
> > > > > +
> > > > > +			ret = intel_vgpu_rw(mdev, (char *)&val, sizeof(val),
> > > > > +					ppos, true);
> > > > > +			if (ret <= 0)
> > > > > +				goto write_err;
> > > > > +
> > > > > +			filled = 8;
> > > > > +		} else if (count >= 4 && !(*ppos % 4)) {
> > > > >  			u32 val;
> > > > >
> > > > >  			if (copy_from_user(&val, buf, sizeof(val)))
> > > > > --
> > > > > 2.7.4
> > > > >
> > > > > _______________________________________________
> > > > > intel-gvt-dev mailing list
> > > > > intel-gvt-dev at lists.freedesktop.org
> > > > > https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev
> > > _______________________________________________
> > > intel-gvt-dev mailing list
> > > intel-gvt-dev at lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev
> > 
> > --
> > Open Source Technology Center, Intel ltd.
> > 
> > $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827

-- 
Open Source Technology Center, Intel ltd.

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