[PATCH 22/22] drm/i915: Enable platform support for vGPU huge gtt pages

[Du, Changbin]

On Wed, Dec 20, 2017 at 04:11:05PM +0800, Zhenyu Wang wrote:
> On 2017.12.20 15:48:35 +0800, changbin.du at intel.com wrote:
> > From: Changbin Du <changbin.du at intel.com>
> > 
> > Now GVTg supports shadowing both 2M/64K huge gtt pages. So this is to
> > remove the restriction on guest side.
> > 
> > Signed-off-by: Changbin Du <changbin.du at intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_gem.c | 9 ---------
> >  1 file changed, 9 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> > index dca15c1..727df2f 100644
> > --- a/drivers/gpu/drm/i915/i915_gem.c
> > +++ b/drivers/gpu/drm/i915/i915_gem.c
> > @@ -5159,15 +5159,6 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
> >  {
> >  	int ret;
> >  
> > -	/*
> > -	 * We need to fallback to 4K pages since gvt gtt handling doesn't
> > -	 * support huge page entries - we will need to check either hypervisor
> > -	 * mm can support huge guest page or just do emulation in gvt.
> > -	 */
> > -	if (intel_vgpu_active(dev_priv))
> > -		mkwrite_device_info(dev_priv)->page_sizes =
> > -			I915_GTT_PAGE_SIZE_4K;
> > -
> 
> For i915 guest, can't simply remove this, but require new pvinfo
> capability bit for compatibility check.
> 
You mean all future drivers need to be compatible with old release?

> >  	dev_priv->mm.unordered_timeline = dma_fence_context_alloc(1);
> >  
> >  	if (HAS_LOGICAL_RING_CONTEXTS(dev_priv)) {
> > -- 
> > 2.7.4
> > 
> > _______________________________________________
> > intel-gvt-dev mailing list
> > intel-gvt-dev at lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev
> 
> -- 
> Open Source Technology Center, Intel ltd.
> 
> $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827



-- 
Thanks,
Changbin Du