[PATCH v2 22/22] drm/i915: Enable platform support for vGPU huge gtt pages
Zhenyu Wang
zhenyuw at linux.intel.com
Fri Dec 22 03:07:42 UTC 2017
On 2017.12.20 17:39:27 +0800, changbin.du at intel.com wrote:
> From: Changbin Du <changbin.du at intel.com>
>
> Now GVTg supports shadowing both 2M/64K huge gtt pages. So this is to
> remove the restriction on guest side.
>
> To be compatible with old host kernel, we defined a new cap info bit
> VGT_CAPS_HUGE_GTT.
>
> v2: Be compatible with old host kernel. (zhenyu)
>
> Signed-off-by: Changbin Du <changbin.du at intel.com>
> ---
> drivers/gpu/drm/i915/gvt/vgpu.c | 1 +
> drivers/gpu/drm/i915/i915_gem.c | 8 ++------
> drivers/gpu/drm/i915/i915_pvinfo.h | 1 +
> drivers/gpu/drm/i915/i915_vgpu.h | 6 ++++++
> 4 files changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c
> index 489a3e0..c6150a3 100644
> --- a/drivers/gpu/drm/i915/gvt/vgpu.c
> +++ b/drivers/gpu/drm/i915/gvt/vgpu.c
> @@ -46,6 +46,7 @@ void populate_pvinfo_page(struct intel_vgpu *vgpu)
>
> vgpu_vreg(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_48BIT_PPGTT;
> vgpu_vreg(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HWSP_EMULATION;
> + vgpu_vreg(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HUGE_GTT;
>
> vgpu_vreg(vgpu, vgtif_reg(avail_rs.mappable_gmadr.base)) =
> vgpu_aperture_gmadr_base(vgpu);
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index dca15c1..60cab0b 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -5159,12 +5159,8 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
> {
> int ret;
>
> - /*
> - * We need to fallback to 4K pages since gvt gtt handling doesn't
> - * support huge page entries - we will need to check either hypervisor
> - * mm can support huge guest page or just do emulation in gvt.
> - */
> - if (intel_vgpu_active(dev_priv))
> + /* We need to fallback to 4K pages if host doesn't support huge gtt. */
> + if (!intel_vgpu_has_huge_gtt(dev_priv))
if (intel_vgpu_active(dev_priv) && !intel_vgpu_has_huge_gtt(dev_priv))
> mkwrite_device_info(dev_priv)->page_sizes =
> I915_GTT_PAGE_SIZE_4K;
>
> diff --git a/drivers/gpu/drm/i915/i915_pvinfo.h b/drivers/gpu/drm/i915/i915_pvinfo.h
> index 195203f..55bde4a 100644
> --- a/drivers/gpu/drm/i915/i915_pvinfo.h
> +++ b/drivers/gpu/drm/i915/i915_pvinfo.h
> @@ -54,6 +54,7 @@ enum vgt_g2v_type {
> */
> #define VGT_CAPS_FULL_48BIT_PPGTT BIT(2)
> #define VGT_CAPS_HWSP_EMULATION BIT(3)
> +#define VGT_CAPS_HUGE_GTT BIT(4)
>
> struct vgt_if {
> u64 magic; /* VGT_MAGIC */
> diff --git a/drivers/gpu/drm/i915/i915_vgpu.h b/drivers/gpu/drm/i915/i915_vgpu.h
> index bb83384..551acc3 100644
> --- a/drivers/gpu/drm/i915/i915_vgpu.h
> +++ b/drivers/gpu/drm/i915/i915_vgpu.h
> @@ -36,6 +36,12 @@ intel_vgpu_has_hwsp_emulation(struct drm_i915_private *dev_priv)
> return dev_priv->vgpu.caps & VGT_CAPS_HWSP_EMULATION;
> }
>
> +static inline bool
> +intel_vgpu_has_huge_gtt(struct drm_i915_private *dev_priv)
> +{
> + return dev_priv->vgpu.caps & VGT_CAPS_HUGE_GTT;
> +}
> +
> int intel_vgt_balloon(struct drm_i915_private *dev_priv);
> void intel_vgt_deballoon(struct drm_i915_private *dev_priv);
>
> --
> 2.7.4
>
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> intel-gvt-dev at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev
--
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