[PATCH] drm/i915/gvt: Clear the shadow page table entry after post-sync

Zhenyu Wang zhenyuw at linux.intel.com
Mon Dec 25 09:38:23 UTC 2017


On 2017.12.25 17:15:43 +0800, Zhi Wang wrote:
> A shadow page table entry needs to be cleared after being set as
> post-sync. This patch fixes the recent error reported in Win7-32 test.
> 
> Fixes: 2707e4446688 ("drm/i915/gvt: vGPU graphics memory virtualization")
> Signed-off-by: Zhi Wang <zhi.a.wang at intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/gtt.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
> index c4f752e..a529d2b 100644
> --- a/drivers/gpu/drm/i915/gvt/gtt.c
> +++ b/drivers/gpu/drm/i915/gvt/gtt.c
> @@ -1410,12 +1410,15 @@ static int ppgtt_handle_guest_write_page_table_bytes(
>  			return ret;
>  	} else {
>  		if (!test_bit(index, spt->post_shadow_bitmap)) {
> +			int type = spt->shadow_page.type;
> +
>  			ppgtt_get_shadow_entry(spt, &se, index);
>  			ret = ppgtt_handle_guest_entry_removal(gpt, &se, index);
>  			if (ret)
>  				return ret;
> +			ops->set_pfn(&se, vgpu->gtt.scratch_pt[type].page_mfn);
> +			ppgtt_set_shadow_entry(spt, &se, index);
>  		}
> -
>  		ppgtt_set_post_shadow(spt, index);
>  	}
>  
> -- 

cc stable?

-- 
Open Source Technology Center, Intel ltd.

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