[PATCH 9/9] drm/i915/gvt: Define PTE addr mask with GENMASK_ULL

[Zhi Wang]

This one looks nice.

BTW: GTT_HAW can be different on different SKUs.

On 12/25/17 17:11, changbin.du at intel.com wrote:
> From: Changbin Du <changbin.du at intel.com>
> 
> Define the masks better.
> 
> Signed-off-by: Changbin Du <changbin.du at intel.com>
> ---
>   drivers/gpu/drm/i915/gvt/gtt.c | 6 +++---
>   1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
> index 1ce6393..5754884 100644
> --- a/drivers/gpu/drm/i915/gvt/gtt.c
> +++ b/drivers/gpu/drm/i915/gvt/gtt.c
> @@ -337,9 +337,9 @@ static inline int gtt_set_entry64(void *pt,
>   
>   #define GTT_HAW 46
>   
> -#define ADDR_1G_MASK (((1UL << (GTT_HAW - 30)) - 1) << 30)
> -#define ADDR_2M_MASK (((1UL << (GTT_HAW - 21)) - 1) << 21)
> -#define ADDR_4K_MASK (((1UL << (GTT_HAW - 12)) - 1) << 12)
> +#define ADDR_1G_MASK	GENMASK_ULL(GTT_HAW - 1, 30)
> +#define ADDR_2M_MASK	GENMASK_ULL(GTT_HAW - 1, 21)
> +#define ADDR_4K_MASK	GENMASK_ULL(GTT_HAW - 1, 12)
>   
>   static unsigned long gen8_gtt_get_pfn(struct intel_gvt_gtt_entry *e)
>   {
>