[PATCH] drm/i915/gvt: Reduce rcs mocs switch latency
Zhenyu Wang
zhenyuw at linux.intel.com
Mon Oct 30 07:59:24 UTC 2017
On 2017.10.30 14:19:15 +0800, changbin.du at intel.com wrote:
> From: Changbin Du <changbin.du at intel.com>
>
> Use I915_WRITE_FW instead of I915_WRITE to reduce overhead.
> The overall mmio switch latency lowers from ~600us to ~180us.
>
> Signed-off-by: Changbin Du <changbin.du at intel.com>
> ---
> drivers/gpu/drm/i915/gvt/render.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/render.c b/drivers/gpu/drm/i915/gvt/render.c
> index e16c355..0672178 100644
> --- a/drivers/gpu/drm/i915/gvt/render.c
> +++ b/drivers/gpu/drm/i915/gvt/render.c
> @@ -209,7 +209,7 @@ static void load_mocs(struct intel_vgpu *vgpu, int ring_id)
> offset.reg = regs[ring_id];
> for (i = 0; i < 64; i++) {
> gen9_render_mocs[ring_id][i] = I915_READ_FW(offset);
> - I915_WRITE(offset, vgpu_vreg(vgpu, offset));
> + I915_WRITE_FW(offset, vgpu_vreg(vgpu, offset));
> offset.reg += 4;
> }
>
> --
applied, thanks!
--
Open Source Technology Center, Intel ltd.
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